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dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs

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The NXP S32 SoCs have a GPR region which is used by a variety of
drivers.  Some examples of the registers in this region are:

  * DDR_PMU_IRQ
  * GMAC0_PHY_INTF_SEL
  * GMAC1_PHY_INTF_SEL
  * PFE_EMACS_INTF_SEL
  * PFE_COH_EN
  * PFE_PWR_CTRL
  * PFE_EMACS_GENCTRL1
  * PFE_GENCTRL3

Use the syscon interface to access these registers.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/792d3f59b9f519529b94e673faf70d77c4b61fb3.1765806521.git.dan.carpenter@linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
Dan Carpenter 2025-12-15 17:41:52 +03:00 committed by Lee Jones
parent 1c378a4c9b
commit 8644fa4a5f
1 changed files with 4 additions and 0 deletions
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4
Documentation/devicetree/bindings/mfd/syscon.yaml
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@ -102,6 +102,8 @@ select:
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
- nxp,s32g2-gpr
- nxp,s32g3-gpr
- qcom,apq8064-mmss-sfpb
- qcom,apq8064-sps-sic
- rockchip,px30-qos
@ -212,6 +214,8 @@ properties:
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
- nxp,s32g2-gpr
- nxp,s32g3-gpr
- qcom,apq8064-mmss-sfpb
- qcom,apq8064-sps-sic
- rockchip,px30-qos