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media: imx: imx-mipi-csis: Set PIXEL_MODE for YUV422

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Bits 13 and 12 of the ISP_CONFIGn register configure the PIXEL_MODE
which specifies the sampling size, in pixel component units, on the
CSI-2 output data interface when data are transferred to memory.

The register description in the chip manual specifies that DUAL mode
should be used for YUV422 data.

Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Xavier Roumegue <xavier.roumegue@oss.nxp.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Rui Miguel Silva <rmfrfs@gmail.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
This commit is contained in:
Jacopo Mondi 2022-02-21 18:47:24 +01:00 committed by Hans Verkuil
parent 9babbbaaeb
commit 8635b5bc2f
1 changed files with 20 additions and 1 deletions
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21
drivers/media/platform/imx/imx-mipi-csis.c
View File

@ -173,6 +173,7 @@
#define MIPI_CSIS_ISPCFG_PIXEL_MODE_SINGLE (0 << 12)
#define MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL (1 << 12)
#define MIPI_CSIS_ISPCFG_PIXEL_MODE_QUAD (2 << 12) /* i.MX8M[MNP] only */
#define MIPI_CSIS_ISPCFG_PIXEL_MASK (3 << 12)
#define MIPI_CSIS_ISPCFG_ALIGN_32BIT BIT(11)
#define MIPI_CSIS_ISPCFG_FMT(fmt) ((fmt) << 2)
#define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2)
@ -506,7 +507,25 @@ static void __mipi_csis_set_format(struct csi_state *state)
/* Color format */
val = mipi_csis_read(state, MIPI_CSIS_ISP_CONFIG_CH(0));
val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK);
val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK
| MIPI_CSIS_ISPCFG_PIXEL_MASK);
/*
* YUV 4:2:2 can be transferred with 8 or 16 bits per clock sample
* (referred to in the documentation as single and dual pixel modes
* respectively, although the 8-bit mode transfers half a pixel per
* clock sample and the 16-bit mode one pixel). While both mode work
* when the CSIS is connected to a receiver that supports either option,
* single pixel mode requires clock rates twice as high. As all SoCs
* that integrate the CSIS can operate in 16-bit bit mode, and some do
* not support 8-bit mode (this is the case of the i.MX8MP), use dual
* pixel mode unconditionally.
*
* TODO: Verify which other formats require DUAL (or QUAD) modes.
*/
if (state->csis_fmt->data_type == MIPI_CSI2_DATA_TYPE_YUV422_8)
val |= MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL;
val |= MIPI_CSIS_ISPCFG_FMT(state->csis_fmt->data_type);
mipi_csis_write(state, MIPI_CSIS_ISP_CONFIG_CH(0), val);