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thunderbolt: Clean up ring interrupt register indexing

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nhi_mask_interrupt() and nhi_clear_interrupt() take "ring" as parameter
but in fact it is not an actual ring but a byte offset to the interrupt
register. Make this less confusing and name the paramers what it really
is and calculate the offset where it is actually needed.

In addition ring_interrupt_active() has two variables called "index"
with different meanings, and the second one shadows the first one
open-coding ring_interrupt_index() as well. Drop that and rename the
remaining what they actually hold.

While there, make the mask variable u32 and use BIT() to avoid signed
shifting.

No functional changes intended.

Assisted-by: LLM
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
This commit is contained in:
Mika Westerberg 2026-08-17 14:09:36 +03:00
parent ea958a1907
commit 85e5f54bb3
1 changed files with 22 additions and 22 deletions
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44
drivers/thunderbolt/nhi.c
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@ -40,6 +40,7 @@ static bool host_reset = true;
module_param(host_reset, bool, 0444);
MODULE_PARM_DESC(host_reset, "reset USB4 host router (default: true)");
/* Returns absolute bit number of the ring in the interrupt registers */
static int ring_interrupt_index(const struct tb_ring *ring)
{
int bit = ring->hop;
@ -48,24 +49,28 @@ static int ring_interrupt_index(const struct tb_ring *ring)
return bit;
}
static void nhi_mask_interrupt(struct tb_nhi *nhi, int mask, int ring)
static void nhi_mask_interrupt(struct tb_nhi *nhi, u32 mask, int reg_index)
{
int offset = reg_index * 4;
if (nhi->quirks & QUIRK_AUTO_CLEAR_INT) {
u32 val;
val = ioread32(nhi->iobase + REG_RING_INTERRUPT_BASE + ring);
iowrite32(val & ~mask, nhi->iobase + REG_RING_INTERRUPT_BASE + ring);
val = ioread32(nhi->iobase + REG_RING_INTERRUPT_BASE + offset);
iowrite32(val & ~mask, nhi->iobase + REG_RING_INTERRUPT_BASE + offset);
} else {
iowrite32(mask, nhi->iobase + REG_RING_INTERRUPT_MASK_CLEAR_BASE + ring);
iowrite32(mask, nhi->iobase + REG_RING_INTERRUPT_MASK_CLEAR_BASE + offset);
}
}
static void nhi_clear_interrupt(struct tb_nhi *nhi, int ring)
static void nhi_clear_interrupt(struct tb_nhi *nhi, int reg_index)
{
int offset = reg_index * 4;
if (nhi->quirks & QUIRK_AUTO_CLEAR_INT)
ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + ring);
ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + offset);
else
iowrite32(~0, nhi->iobase + REG_RING_INT_CLEAR + ring);
iowrite32(~0, nhi->iobase + REG_RING_INT_CLEAR + offset);
}
/*
@ -75,22 +80,17 @@ static void nhi_clear_interrupt(struct tb_nhi *nhi, int ring)
*/
static void ring_interrupt_active(struct tb_ring *ring, bool active)
{
int index = ring_interrupt_index(ring) / 32 * 4;
int reg = REG_RING_INTERRUPT_BASE + index;
int interrupt_bit = ring_interrupt_index(ring) & 31;
int mask = 1 << interrupt_bit;
int interrupt_index = ring_interrupt_index(ring);
int reg_index = interrupt_index / 32;
int reg = REG_RING_INTERRUPT_BASE + reg_index * 4;
int interrupt_bit = interrupt_index % 32;
u32 mask = BIT(interrupt_bit);
u32 old, new;
if (ring->irq > 0) {
u32 step, shift, ivr, misc, itr;
void __iomem *ivr_base;
int auto_clear_bit;
int index;
if (ring->is_tx)
index = ring->hop;
else
index = ring->hop + ring->nhi->hop_count;
/*
* Intel routers support a bit that isn't part of
@ -113,8 +113,8 @@ static void ring_interrupt_active(struct tb_ring *ring, bool active)
ring->nhi->iobase + REG_DMA_MISC);
ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
step = interrupt_index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
shift = interrupt_index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
ivr = ioread32(ivr_base + step);
ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);
if (active)
@ -155,7 +155,7 @@ static void ring_interrupt_active(struct tb_ring *ring, bool active)
if (active)
iowrite32(new, ring->nhi->iobase + reg);
else
nhi_mask_interrupt(ring->nhi, mask, index);
nhi_mask_interrupt(ring->nhi, mask, reg_index);
}
/*
@ -168,11 +168,11 @@ void nhi_disable_interrupts(struct tb_nhi *nhi)
int i = 0;
/* disable interrupts */
for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
nhi_mask_interrupt(nhi, ~0, 4 * i);
nhi_mask_interrupt(nhi, ~0, i);
/* clear interrupt status bits */
for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
nhi_clear_interrupt(nhi, 4 * i);
nhi_clear_interrupt(nhi, i);
}
/* ring helper methods */