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arm64: dts: qcom: x1e80100: Add uart14

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Add the uart14 instance for X1E80100 (typically used for Bluetooth).

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20241007-x1e80100-pwrseq-qcp-v1-2-f7166510ab17@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Stephan Gerhold 2024-10-07 20:22:26 +02:00 committed by Bjorn Andersson
parent c8327bb53b
commit 85b4b74ba9
1 changed files with 53 additions and 0 deletions
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53
arch/arm64/boot/dts/qcom/x1e80100.dtsi
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@ -1989,6 +1989,31 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
status = "disabled";
};
uart14: serial@a98000 {
compatible = "qcom,geni-uart";
reg = <0 0x00a98000 0 0x4000>;
interrupts = <GIC_SPI 806 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
clock-names = "se";
interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
&clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "qup-core",
"qup-config";
power-domains = <&rpmhpd RPMHPD_CX>;
operating-points-v2 = <&qup_opp_table_100mhz>;
pinctrl-0 = <&qup_uart14_default>;
pinctrl-names = "default";
status = "disabled";
};
i2c15: i2c@a9c000 {
compatible = "qcom,geni-i2c";
reg = <0 0x00a9c000 0 0x4000>;
@ -6117,6 +6142,34 @@ rx-pins {
};
};
qup_uart14_default: qup-uart14-default-state {
cts-pins {
pins = "gpio56";
function = "qup1_se6";
bias-bus-hold;
};
rts-pins {
pins = "gpio57";
function = "qup1_se6";
drive-strength = <2>;
bias-disable;
};
tx-pins {
pins = "gpio58";
function = "qup1_se6";
drive-strength = <2>;
bias-disable;
};
rx-pins {
pins = "gpio59";
function = "qup1_se6";
bias-pull-up;
};
};
qup_uart21_default: qup-uart21-default-state {
tx-pins {
pins = "gpio86";