mirror of
https://github.com/torvalds/linux.git
synced 2026-11-07 06:17:02 +01:00
Qualcomm pin control fixes for v7.3-rc7
- fix intr_target_width in several qualcomm pinctrl drivers - make direction changes exclusive in pinctrl-spmi-gpio - fix function issues in pinctrl-ipq5018 - add missing OF module alias to pinctrl-ipq5210 - split QUP1 SE2/SE3 into lane-pair functions -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEkeUTLeW1Rh17omX8BZ0uy/82hMMFAmrHXMIACgkQBZ0uy/82 hMN6ZQ/+LQi2B9W9kqtSq047/MRUOKgKDPl5AiZjlP7k9lmV3FKDgi6NtUnFJURY xIx7z00/9mffqqnLlXkBP8bZq4N6wgUiqVE//0F+K+8MfYfXDQsZdHgHet6GvQak kpVrwLG+G9brGpfDvoOZxPMQsYUoLvOnUgdG8L3kuPloaquk/3lv9HXHi2J7QFqo J64t1ZPYgfszhwpbMtrDT5s1xn8KeahQmi3ZOB6dJq65F1FF3/BvjjeI8UaMcH+6 M1NCgqs2Q6Lwiqa8y8pFXzgcOkPKlRd1PSdKzFfsKt9FuPTx33xtwJ/kGl7P0P2E PHxr9YtYaWw1n498skbA+I850GHUeE4Fj66rSIdwktTfcz7VDR5WfHUAsJ9WZY/x iErOCazqVSu8fAY44HhX3s1fc/mb91JrMX0GdxpsfKHVpI93Yb9pNZE70aoqSOC/ iMCwqQy6sX1LazUlELyheHFB/flftykaieeBp0VpUOEaN6WsmcdpAiRMQIWEldWg +AmeFK59hqUdwoQLieN4Dk/SCXt2zW0KRiz4rGSySfY/c0qCGh6hU/Pcko/G7L04 CfvAGPHD52lnMVq8J1DxbQ5exYw2wby2m77mJnALRI9tGJ1rcAJXMgXOZZPGqdxi cR0eOKlYmt9l/tD8vW1QhXBfrQWTboVCkBaWHrkPOef4dowdv8I= =fFv6 -----END PGP SIGNATURE----- Merge tag 'pinctrl-qcom-fixes-for-v7.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into fixes Qualcomm pin control fixes for v7.3-rc7 - fix intr_target_width in several qualcomm pinctrl drivers - make direction changes exclusive in pinctrl-spmi-gpio - fix function issues in pinctrl-ipq5018 - add missing OF module alias to pinctrl-ipq5210 - split QUP1 SE2/SE3 into lane-pair functions Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
commit
85b3a4d503
|
|
@ -47,6 +47,7 @@
|
|||
.intr_wakeup_present_bit = 6, \
|
||||
.intr_wakeup_enable_bit = 7, \
|
||||
.intr_target_bit = 8, \
|
||||
.intr_target_width = 4, \
|
||||
.intr_target_kpss_val = 3, \
|
||||
.intr_raw_status_bit = 4, \
|
||||
.intr_polarity_bit = 1, \
|
||||
|
|
|
|||
|
|
@ -361,7 +361,7 @@ static const char * const blsp1_uart0_groups[] = {
|
|||
};
|
||||
|
||||
static const char * const gcc_plltest_groups[] = {
|
||||
"gpio10", "gpio12",
|
||||
"gpio10",
|
||||
};
|
||||
|
||||
static const char * const gcc_tlmm_groups[] = {
|
||||
|
|
@ -539,7 +539,7 @@ static const char * const qdss_tracectl_b_groups[] = {
|
|||
};
|
||||
|
||||
static const char * const pwm0_groups[] = {
|
||||
"gpio42",
|
||||
"gpio42", "gpio46",
|
||||
};
|
||||
|
||||
static const char * const qdss_cti_trig_out_b0_groups[] = {
|
||||
|
|
@ -547,7 +547,7 @@ static const char * const qdss_cti_trig_out_b0_groups[] = {
|
|||
};
|
||||
|
||||
static const char * const pwm1_groups[] = {
|
||||
"gpio43",
|
||||
"gpio43", "gpio1",
|
||||
};
|
||||
|
||||
static const char * const qdss_cti_trig_in_b0_groups[] = {
|
||||
|
|
@ -555,7 +555,7 @@ static const char * const qdss_cti_trig_in_b0_groups[] = {
|
|||
};
|
||||
|
||||
static const char * const pwm2_groups[] = {
|
||||
"gpio44",
|
||||
"gpio12", "gpio44",
|
||||
};
|
||||
|
||||
static const char * const qdss_cti_trig_out_b1_groups[] = {
|
||||
|
|
@ -563,7 +563,7 @@ static const char * const qdss_cti_trig_out_b1_groups[] = {
|
|||
};
|
||||
|
||||
static const char * const pwm3_groups[] = {
|
||||
"gpio45",
|
||||
"gpio45", "gpio30", "gpio13",
|
||||
};
|
||||
|
||||
static const char * const qdss_cti_trig_in_b1_groups[] = {
|
||||
|
|
@ -677,7 +677,7 @@ static const struct pinfunction ipq5018_functions[] = {
|
|||
|
||||
static const struct msm_pingroup ipq5018_groups[] = {
|
||||
PINGROUP(0, atest_char, _, qdss_cti_trig_out_a0, wci_txd, wci_rxd, xfem, _, _, _),
|
||||
PINGROUP(1, atest_char, _, qdss_cti_trig_in_a0, wci_txd, wci_rxd, xfem, _, _, _),
|
||||
PINGROUP(1, atest_char, pwm1, qdss_cti_trig_in_a0, wci_txd, wci_rxd, xfem, _, _, _),
|
||||
PINGROUP(2, atest_char, _, qdss_cti_trig_out_a1, wci_txd, wci_rxd, xfem, _, _, _),
|
||||
PINGROUP(3, atest_char, _, qdss_cti_trig_in_a1, wci_txd, wci_rxd, xfem, _, _, _),
|
||||
PINGROUP(4, sdc1_data, qspi_data, blsp1_spi1, btss, dbg_out, qdss_traceclk_a, _, burn0, _),
|
||||
|
|
@ -688,8 +688,8 @@ static const struct msm_pingroup ipq5018_groups[] = {
|
|||
PINGROUP(9, sdc1_clk, qspi_clk, _, qdss_tracedata_a, _, _, _, _, _),
|
||||
PINGROUP(10, blsp0_spi, blsp1_uart0, led0, gcc_plltest, qdss_tracedata_a, _, _, _, _),
|
||||
PINGROUP(11, blsp0_spi, blsp1_uart0, _, gcc_tlmm, qdss_tracedata_a, _, _, _, _),
|
||||
PINGROUP(12, blsp0_spi, blsp0_i2c, blsp1_uart0, _, gcc_plltest, qdss_tracedata_a, _, _, _),
|
||||
PINGROUP(13, blsp0_spi, blsp0_i2c, blsp1_uart0, _, qdss_tracedata_a, _, _, _, _),
|
||||
PINGROUP(12, blsp0_spi, blsp0_i2c, blsp1_uart0, _, pwm2, qdss_tracedata_a, _, _, _),
|
||||
PINGROUP(13, blsp0_spi, blsp0_i2c, blsp1_uart0, pwm3, qdss_tracedata_a, _, _, _, _),
|
||||
PINGROUP(14, pcie0_clk, _, _, cri_trng0, qdss_tracedata_a, _, _, _, _),
|
||||
PINGROUP(15, _, _, cri_trng1, qdss_tracedata_a, _, _, _, _, _),
|
||||
PINGROUP(16, pcie0_wake, _, _, cri_trng, qdss_tracedata_a, _, _, _, _),
|
||||
|
|
@ -706,7 +706,7 @@ static const struct msm_pingroup ipq5018_groups[] = {
|
|||
PINGROUP(27, audio_txmclk, wsa_swrm, audio_txmclk, blsp2_spi, btss, _, qdss_tracedata_b, _, _),
|
||||
PINGROUP(28, audio_txbclk, wsa_swrm, blsp0_uart1, btss, qdss_tracedata_b, _, _, _, _),
|
||||
PINGROUP(29, audio_txfsync, _, blsp0_uart1, _, qdss_tracedata_b, _, _, _, _),
|
||||
PINGROUP(30, audio_txd, led2, led0, _, _, _, _, _, _),
|
||||
PINGROUP(30, audio_txd, led2, led0, pwm3, _, _, _, _, _),
|
||||
PINGROUP(31, blsp2_spi0, blsp1_uart1, _, qdss_tracedata_b, eud_gpio, _, _, _, _),
|
||||
PINGROUP(32, blsp2_spi0, blsp1_uart1, _, qdss_tracedata_b, eud_gpio, _, _, _, _),
|
||||
PINGROUP(33, blsp2_i2c0, blsp2_spi0, blsp1_uart1, _, qdss_tracedata_b, eud_gpio, _, _, _),
|
||||
|
|
@ -722,7 +722,7 @@ static const struct msm_pingroup ipq5018_groups[] = {
|
|||
PINGROUP(43, pwm1, qdss_cti_trig_in_b0, wci_txd, wci_rxd, xfem, _, _, _, _),
|
||||
PINGROUP(44, pwm2, qdss_cti_trig_out_b1, wci_txd, wci_rxd, xfem, _, _, _, _),
|
||||
PINGROUP(45, pwm3, qdss_cti_trig_in_b1, wci_txd, wci_rxd, xfem, _, _, _, _),
|
||||
PINGROUP(46, led0, _, _, _, _, _, _, _, _),
|
||||
PINGROUP(46, led0, pwm0, _, _, _, _, _, _, _),
|
||||
};
|
||||
|
||||
static const struct msm_pinctrl_soc_data ipq5018_pinctrl = {
|
||||
|
|
|
|||
|
|
@ -47,6 +47,7 @@
|
|||
.intr_wakeup_present_bit = 6, \
|
||||
.intr_wakeup_enable_bit = 7, \
|
||||
.intr_target_bit = 8, \
|
||||
.intr_target_width = 4, \
|
||||
.intr_target_kpss_val = 3, \
|
||||
.intr_raw_status_bit = 4, \
|
||||
.intr_polarity_bit = 1, \
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@
|
|||
.intr_wakeup_present_bit = 6, \
|
||||
.intr_wakeup_enable_bit = 7, \
|
||||
.intr_target_bit = 8, \
|
||||
.intr_target_width = 4, \
|
||||
.intr_target_kpss_val = 3, \
|
||||
.intr_raw_status_bit = 4, \
|
||||
.intr_polarity_bit = 1, \
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@
|
|||
.intr_enable_bit = 0, \
|
||||
.intr_status_bit = 0, \
|
||||
.intr_target_bit = 5, \
|
||||
.intr_target_width = 4, \
|
||||
.intr_target_kpss_val = 3, \
|
||||
.intr_raw_status_bit = 4, \
|
||||
.intr_polarity_bit = 1, \
|
||||
|
|
|
|||
|
|
@ -734,29 +734,50 @@ static int pmic_gpio_get_direction(struct gpio_chip *chip, unsigned pin)
|
|||
(!pad->input_enabled && !pad->output_enabled))
|
||||
return -EINVAL;
|
||||
|
||||
/* Make sure the state is aligned on what pmic_gpio_get() returns */
|
||||
return pad->input_enabled ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;
|
||||
/*
|
||||
* An open-drain or open-source pad keeps its input buffer enabled while
|
||||
* driving, so the output buffer is what tells the direction.
|
||||
*/
|
||||
return pad->output_enabled ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
|
||||
}
|
||||
|
||||
static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned pin)
|
||||
{
|
||||
struct pmic_gpio_state *state = gpiochip_get_data(chip);
|
||||
unsigned long config;
|
||||
unsigned long configs[2];
|
||||
|
||||
config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1);
|
||||
configs[0] = pinconf_to_config_packed(PIN_CONFIG_OUTPUT_ENABLE, 0);
|
||||
configs[1] = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1);
|
||||
|
||||
return pmic_gpio_config_set(state->ctrl, pin, &config, 1);
|
||||
return pmic_gpio_config_set(state->ctrl, pin, configs,
|
||||
ARRAY_SIZE(configs));
|
||||
}
|
||||
|
||||
static int pmic_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned pin, int val)
|
||||
{
|
||||
struct pmic_gpio_state *state = gpiochip_get_data(chip);
|
||||
unsigned long config;
|
||||
struct pmic_gpio_pad *pad = state->ctrl->desc->pins[pin].drv_data;
|
||||
unsigned long configs[2];
|
||||
|
||||
config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, val);
|
||||
/*
|
||||
* An open-drain or open-source pad only ever drives one rail, so the
|
||||
* line can still be sampled while the pad is an output. Keep the input
|
||||
* buffer enabled for those, so that pmic_gpio_get() reports what is on
|
||||
* the wire rather than the value last written, and disable it for a
|
||||
* CMOS pad, so that the pad ends up in DIGITAL_OUTPUT rather than
|
||||
* DIGITAL_INPUT_OUTPUT. Program it either way, as the buffer may have
|
||||
* been left in the opposite state by the bootloader or by an earlier
|
||||
* direction change with a different buffer type. gpiolib applies
|
||||
* PIN_CONFIG_DRIVE_OPEN_DRAIN before calling this, so buffer_type is
|
||||
* already up to date here.
|
||||
*/
|
||||
configs[0] = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE,
|
||||
pad->buffer_type != PMIC_GPIO_OUT_BUF_CMOS);
|
||||
configs[1] = pinconf_to_config_packed(PIN_CONFIG_LEVEL, val);
|
||||
|
||||
return pmic_gpio_config_set(state->ctrl, pin, &config, 1);
|
||||
return pmic_gpio_config_set(state->ctrl, pin, configs,
|
||||
ARRAY_SIZE(configs));
|
||||
}
|
||||
|
||||
static int pmic_gpio_get(struct gpio_chip *chip, unsigned pin)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user