m68knommu: updates and fixes for v7.4

. plaform RNG driver for ColdFire 54418
 . PWM address defines for ColdFire 54418
 . fix secomp filtering
 . fix compile breakage for Cleopatra board
 . update stmark defconfig
 . remove unused header
 . fix typos
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Merge tag 'm68knommu-for-v7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu

Pull m68knommu updates from Greg Ungerer:
 "Platform code added for the ColdFire 54418 RNG hardware block. Also
  PWM address definitions for the 54418. A fix for seccomp filter
  processing during system call entry and a fix for compiling the
  Cleopatra board target. A config update for the stmark board, and
  lastly a couple of typo fixes"

* tag 'm68knommu-for-v7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  m68k: coldfire: Add RNG support for MCF54418
  m68k: mcf5441x: add PWM defines
  m68knommu: fix compile breakage for 5407 cleopatra board
  m68k: defconfig: update stmark2 defconfig
  m68k: Fix seccomp filtering on ColdFire and 68000
  m68k: remove unused <asm/quicc_simple.h> header
  m68k: fix typo "eanble" in comment
  m68k: coldfire: fix typos in reset.c comment
This commit is contained in:
Linus Torvalds 2026-10-27 15:06:53 -10:00
commit 857c32a3b8
12 changed files with 67 additions and 59 deletions

View File

@ -79,7 +79,8 @@ ENTRY(system_call)
/* Doing a trace ? */
getthreadinfo
btst #(TIF_SYSCALL_TRACE%8),%a2@(TINFO_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
moveb %a2@(TINFO_FLAGS+2),%d1
andl #((_TIF_SYSCALL_TRACE + _TIF_SECCOMP) >> 8),%d1
jne do_trace
cmpl #NR_syscalls,%d0
jcc badsys

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@ -622,6 +622,31 @@ static struct platform_device mcf_flexcan0 = {
};
#endif /* MCFFLEXCAN_SIZE */
#ifdef MCF_RNG_BASE
/*
* Random Number Generator (RNG) - only on MCF54418
*/
static struct resource mcf_rng_resource[] = {
{
.start = MCF_RNG_BASE,
.end = MCF_RNG_BASE + MCF_RNG_SIZE - 1,
.flags = IORESOURCE_MEM,
},
{
.start = MCF_IRQ_RNG,
.end = MCF_IRQ_RNG,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mcf_rng = {
.name = "imx-rngc",
.id = -1,
.num_resources = ARRAY_SIZE(mcf_rng_resource),
.resource = mcf_rng_resource,
};
#endif /* MCF_RNG_BASE */
static struct platform_device *mcf_devices[] __initdata = {
&mcf_uart,
#ifdef MCFFEC_BASE0
@ -660,6 +685,9 @@ static struct platform_device *mcf_devices[] __initdata = {
#ifdef MCFFLEXCAN_SIZE
&mcf_flexcan0,
#endif
#ifdef MCF_RNG_BASE
&mcf_rng,
#endif
};
/*

View File

@ -72,7 +72,8 @@ ENTRY(system_call)
movel %d2,%a0
movel %a0@,%a1 /* save top of frame */
movel %sp,%a1@(TASK_THREAD+THREAD_ESP0)
btst #(TIF_SYSCALL_TRACE%8),%a0@(TINFO_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
moveb %a0@(TINFO_FLAGS+2),%d2
andl #((_TIF_SYSCALL_TRACE + _TIF_SECCOMP) >> 8),%d2
bnes 1f
movel %d3,%a0

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@ -22,6 +22,11 @@
/***************************************************************************/
/*
* Some platforms need software versions of the GPIO data registers.
*/
unsigned short ppdata;
DEFINE_CLK(pll, "pll.0", MCF_CLK);
DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);

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@ -161,6 +161,7 @@ static struct clk * const enable_clks[] __initconst = {
&__clk_0_33, /* pit.1 */
&__clk_0_36, /* eport */
&__clk_0_48, /* pll */
&__clk_0_49, /* rng */
&__clk_0_51, /* esdhc */
&__clk_1_36, /* CCM/reset module/Power management */
@ -183,7 +184,6 @@ static struct clk * const disable_clks[] __initconst = {
&__clk_0_44, /* usb otg */
&__clk_0_45, /* usb host */
&__clk_0_47, /* ssi.0 */
&__clk_0_49, /* rng */
&__clk_0_50, /* ssi.1 */
&__clk_0_53, /* enet-fec */
&__clk_0_54, /* enet-fec */

View File

@ -16,7 +16,7 @@
#include <asm/mcfsim.h>
/*
* There are 2 common methods amongst the ColdFure parts for reseting
* There are 2 common methods amongst the ColdFire parts for resetting
* the CPU. But there are couple of exceptions, the 5272 and the 547x
* have something completely special to them, and we let their specific
* subarch code handle them.

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@ -76,6 +76,8 @@ CONFIG_DMADEVICES=y
CONFIG_MCF_EDMA=y
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VHOST_MENU is not set
CONFIG_IIO=y
CONFIG_MCF54415_DAC=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y

View File

@ -32,7 +32,7 @@
#define CACR_DCM_PRE 0x00000200 /* Cache inhibited, precise */
#define CACR_DCM_IMPRE 0x00000300 /* Cache inhibited, imprecise */
#define CACR_WPROTECT 0x00000020 /* Write protect*/
#define CACR_EUSP 0x00000010 /* Eanble separate user a7 */
#define CACR_EUSP 0x00000010 /* Enable separate user a7 */
/*
* Define the Access Control register flags.

View File

@ -240,6 +240,15 @@
#define MCFRTC_SIZE (0xfc0a8840 - 0xfc0a8000)
#define MCF_IRQ_RTC (MCFINT2_VECBASE + MCFINT2_RTC)
/*
* Random Number Generator (RNG) Module.
* Note: Only present in MCF54418, not in MCF54410/54415/54417
*/
#define MCF_RNG_BASE 0xfc0c4000
#define MCF_RNG_SIZE 0x1c
#define MCFINT2_RNG 28
#define MCF_IRQ_RNG (MCFINT2_VECBASE + MCFINT2_RNG)
/*
* GPIO Module.
*/
@ -375,4 +384,11 @@
#define MCF_IRQ_BOFF1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_BOFF)
#define MCF_IRQ_ERR1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_ERR)
/*
* PWM module
*/
#define MCFPWM_BASE 0xec088000
#define MCFPWM_SIZE 0x150
#define MCFPWM_SUB_SIZE 0x50
#endif /* m5441xsim_h */

View File

@ -1,53 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/***********************************
* $Id: quicc_simple.h,v 1.1 2002/03/02 15:01:10 gerg Exp $
***********************************
*
***************************************
* Simple drivers common header
***************************************
*/
#ifndef __SIMPLE_H
#define __SIMPLE_H
/* #include "quicc.h" */
#define GLB_SCC_0 0
#define GLB_SCC_1 1
#define GLB_SCC_2 2
#define GLB_SCC_3 3
typedef void (int_routine)(unsigned short interrupt_event);
typedef int_routine *int_routine_ptr;
typedef void *(alloc_routine)(int length);
typedef void (free_routine)(int scc_num, int channel_num, void *buf);
typedef void (store_rx_buffer_routine)(int scc_num, int channel_num, void *buff, int length);
typedef int (handle_tx_error_routine)(int scc_num, int channel_num, QUICC_BD *tbd);
typedef void (handle_rx_error_routine)(int scc_num, int channel_num, QUICC_BD *rbd);
typedef void (handle_lost_error_routine)(int scc_num, int channel_num);
/* user defined functions for global errors */
typedef void (handle_glob_overrun_routine)(int scc_number);
typedef void (handle_glob_underrun_routine)(int scc_number);
typedef void (glob_intr_q_overflow_routine)(int scc_number);
/*
* General initialization and command routines
*/
void quicc_issue_cmd (unsigned short cmd, int scc_num);
void quicc_init(void);
void quicc_scc_init(int scc_number, int number_of_rx_buf, int number_of_tx_buf);
void quicc_smc_init(int smc_number, int number_of_rx_buf, int number_of_tx_buf);
void quicc_scc_start(int scc_num);
void quicc_scc_loopback(int scc_num);
/* Interrupt enable/disable routines for critical pieces of code*/
unsigned short IntrDis(void);
void IntrEna(unsigned short old_sr);
/* For debugging */
void print_rbd(int scc_num);
void print_tbd(int scc_num);
#endif

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@ -270,12 +270,13 @@ config HW_RANDOM_MXC_RNGA
config HW_RANDOM_IMX_RNGC
tristate "Freescale i.MX RNGC Random Number Generator"
depends on HAS_IOMEM
depends on SOC_IMX25 || SOC_IMX6SL || SOC_IMX6SLL || SOC_IMX6UL || COMPILE_TEST
depends on SOC_IMX25 || SOC_IMX6SL || SOC_IMX6SLL || SOC_IMX6UL || COLDFIRE || COMPILE_TEST
default HW_RANDOM
help
This driver provides kernel-side support for the Random Number
Generator Version C hardware found on some Freescale i.MX
processors. Version B is also supported by this driver.
Also supports RNGB on Freescale MCF54418 (Coldfire V4e).
To compile this driver as a module, choose M here: the
module will be called imx-rngc.

View File

@ -354,12 +354,19 @@ static const struct of_device_id imx_rngc_dt_ids[] = {
};
MODULE_DEVICE_TABLE(of, imx_rngc_dt_ids);
static const struct platform_device_id imx_rngc_devtype[] = {
{ .name = "imx-rngc" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, imx_rngc_devtype);
static struct platform_driver imx_rngc_driver = {
.driver = {
.name = KBUILD_MODNAME,
.pm = pm_ptr(&imx_rngc_pm_ops),
.of_match_table = imx_rngc_dt_ids,
},
.id_table = imx_rngc_devtype,
};
module_platform_driver_probe(imx_rngc_driver, imx_rngc_probe);