github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-28 01:55:51 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

media: qcom: iris: use common set_preset_registers function

Browse Source 
The set_preset_registers is (currently) common to all supported devices.
Extract it to a iris_vpu_common.c and call it directly from
iris_vpu_power_on(). Later, if any of the devices requires special
handling, it can be sorted out separately.

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2026-03-29 02:33:03 +02:00 committed by Bryan O'Donoghue
parent 335cdc4c43
commit 8550eebfca
5 changed files with 8 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/media/platform/qcom/iris/iris_platform_common.h
View File

@ -207,7 +207,6 @@ struct iris_platform_data {
struct iris_inst *(*get_instance)(void);
u32 (*get_vpu_buffer_size)(struct iris_inst *inst, enum iris_buffer_type buffer_type);
const struct vpu_ops *vpu_ops;
void (*set_preset_registers)(struct iris_core *core);
const struct icc_info *icc_tbl;
unsigned int icc_tbl_size;
const struct bw_info *bw_tbl_dec;

7
drivers/media/platform/qcom/iris/iris_platform_gen1.c
View File

@ -260,11 +260,6 @@ static struct platform_inst_caps platform_inst_cap_sm8250 = {
.max_operating_rate = MAXIMUM_FPS,
};
static void iris_set_sm8250_preset_registers(struct iris_core *core)
{
writel(0x0, core->reg_base + 0xB0088);
}
static const struct icc_info sm8250_icc_table[] = {
{ "cpu-cfg", 1000, 1000 },
{ "video-mem", 1000, 15000000 },
@ -343,7 +338,6 @@ const struct iris_platform_data sm8250_data = {
.init_hfi_response_ops = iris_hfi_gen1_response_ops_init,
.get_vpu_buffer_size = iris_vpu_buf_size,
.vpu_ops = &iris_vpu2_ops,
.set_preset_registers = iris_set_sm8250_preset_registers,
.icc_tbl = sm8250_icc_table,
.icc_tbl_size = ARRAY_SIZE(sm8250_icc_table),
.clk_rst_tbl = sm8250_clk_reset_table,
@ -397,7 +391,6 @@ const struct iris_platform_data sc7280_data = {
.init_hfi_response_ops = iris_hfi_gen1_response_ops_init,
.get_vpu_buffer_size = iris_vpu_buf_size,
.vpu_ops = &iris_vpu2_ops,
.set_preset_registers = iris_set_sm8250_preset_registers,
.icc_tbl = sm8250_icc_table,
.icc_tbl_size = ARRAY_SIZE(sm8250_icc_table),
.bw_tbl_dec = sc7280_bw_table_dec,

9
drivers/media/platform/qcom/iris/iris_platform_gen2.c
View File

@ -756,11 +756,6 @@ static struct platform_inst_caps platform_inst_cap_sm8550 = {
.max_operating_rate = MAXIMUM_FPS,
};
static void iris_set_sm8550_preset_registers(struct iris_core *core)
{
writel(0x0, core->reg_base + 0xB0088);
}
static const struct icc_info sm8550_icc_table[] = {
{ "cpu-cfg", 1000, 1000 },
{ "video-mem", 1000, 15000000 },
@ -917,7 +912,6 @@ const struct iris_platform_data sm8550_data = {
.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
.get_vpu_buffer_size = iris_vpu_buf_size,
.vpu_ops = &iris_vpu3_ops,
.set_preset_registers = iris_set_sm8550_preset_registers,
.icc_tbl = sm8550_icc_table,
.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
.clk_rst_tbl = sm8550_clk_reset_table,
@ -1018,7 +1012,6 @@ const struct iris_platform_data sm8650_data = {
.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
.get_vpu_buffer_size = iris_vpu33_buf_size,
.vpu_ops = &iris_vpu33_ops,
.set_preset_registers = iris_set_sm8550_preset_registers,
.icc_tbl = sm8550_icc_table,
.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
.clk_rst_tbl = sm8650_clk_reset_table,
@ -1114,7 +1107,6 @@ const struct iris_platform_data sm8750_data = {
.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
.get_vpu_buffer_size = iris_vpu33_buf_size,
.vpu_ops = &iris_vpu35_ops,
.set_preset_registers = iris_set_sm8550_preset_registers,
.icc_tbl = sm8550_icc_table,
.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
.clk_rst_tbl = sm8750_clk_reset_table,
@ -1212,7 +1204,6 @@ const struct iris_platform_data qcs8300_data = {
.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
.get_vpu_buffer_size = iris_vpu_buf_size,
.vpu_ops = &iris_vpu3_ops,
.set_preset_registers = iris_set_sm8550_preset_registers,
.icc_tbl = sm8550_icc_table,
.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
.clk_rst_tbl = sm8550_clk_reset_table,

7
drivers/media/platform/qcom/iris/iris_vpu_common.c
View File

@ -468,7 +468,7 @@ int iris_vpu_power_on(struct iris_core *core)
iris_opp_set_rate(core->dev, freq);
core->iris_platform_data->set_preset_registers(core);
iris_vpu_set_preset_registers(core);
iris_vpu_interrupt_init(core);
core->intr_status = 0;
@ -485,3 +485,8 @@ int iris_vpu_power_on(struct iris_core *core)
return ret;
}
void iris_vpu_set_preset_registers(struct iris_core *core)
{
writel(0x0, core->reg_base + 0xb0088);
}

2
drivers/media/platform/qcom/iris/iris_vpu_common.h
View File

@ -39,4 +39,6 @@ int iris_vpu35_vpu4x_power_on_controller(struct iris_core *core);
void iris_vpu35_vpu4x_program_bootup_registers(struct iris_core *core);
u64 iris_vpu3x_vpu4x_calculate_frequency(struct iris_inst *inst, size_t data_size);
void iris_vpu_set_preset_registers(struct iris_core *core);
#endif