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arm64: dts: s32g: Add GPR syscon region

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Add the GPR syscon region for the s32 chipset.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
[jkangas@redhat.com: GPR syscon resized from 0x3000 to 0x100]
Signed-off-by: Jared Kangas <jkangas@redhat.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Dan Carpenter 2026-07-21 09:12:41 -07:00 committed by Frank Li
parent c482d6c371
commit 853d77cc0c
2 changed files with 12 additions and 0 deletions
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6
arch/arm64/boot/dts/freescale/s32g2.dtsi
View File

@ -122,6 +122,11 @@ rtc0: rtc@40060000 {
clock-names = "ipg", "source0";
};
gpr: syscon@4007c000 {
compatible = "nxp,s32g2-gpr", "syscon";
reg = <0x4007c000 0x100>;
};
pinctrl: pinctrl@4009c240 {
compatible = "nxp,s32g2-siul2-pinctrl";
/* MSCR0-MSCR101 registers on siul2_0 */
@ -814,6 +819,7 @@ gmac0: ethernet@4033c000 {
compatible = "nxp,s32g2-dwmac";
reg = <0x4033c000 0x2000>, /* gmac IP */
<0x4007c004 0x4>; /* GMAC_0_CTRL_STS */
nxp,phy-sel = <&gpr 0x4>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";

6
arch/arm64/boot/dts/freescale/s32g3.dtsi
View File

@ -180,6 +180,11 @@ rtc0: rtc@40060000 {
clock-names = "ipg", "source0";
};
gpr: syscon@4007c000 {
compatible = "nxp,s32g3-gpr", "syscon";
reg = <0x4007c000 0x100>;
};
pinctrl: pinctrl@4009c240 {
compatible = "nxp,s32g2-siul2-pinctrl";
/* MSCR0-MSCR101 registers on siul2_0 */
@ -893,6 +898,7 @@ gmac0: ethernet@4033c000 {
compatible = "nxp,s32g2-dwmac";
reg = <0x4033c000 0x2000>, /* gmac IP */
<0x4007c004 0x4>; /* GMAC_0_CTRL_STS */
nxp,phy-sel = <&gpr 0x4>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";