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wifi: mt76: mt7996: Do not schedule RRO and TxFree queues during reset for NPU

Browse Source 
This is a preliminary patch to properly manage reset procedure when NPU
offloading is enabled.

Tested-by: Kang Yang <kang.yang@airoha.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20260122-mt76-npu-eagle-offload-v2-15-2374614c0de6@kernel.org
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Lorenzo Bianconi 2026-01-22 11:39:59 +01:00 committed by Felix Fietkau
parent 966c44ba73
commit 850856c477
4 changed files with 40 additions and 0 deletions
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11
drivers/net/wireless/mediatek/mt76/dma.c
View File

@ -881,6 +881,10 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
mt76_queue_is_wed_rro(q))
continue;
if (mt76_npu_device_active(dev) &&
mt76_queue_is_wed_rro(q))
continue;
if (!mt76_queue_is_wed_rro_rxdmad_c(q) &&
!mt76_queue_is_wed_rro_ind(q))
mt76_put_page_pool_buf(buf, false);
@ -923,6 +927,13 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
mt76_queue_is_wed_rro(q))
return;
if (mt76_npu_device_active(dev) &&
mt76_queue_is_wed_rro(q))
return;
if (mt76_queue_is_npu_txfree(q))
return;
mt76_dma_sync_idx(dev, q);
if (mt76_queue_is_npu(q))
mt76_npu_fill_rx_queue(dev, q);

10
drivers/net/wireless/mediatek/mt76/mt76.h
View File

@ -55,6 +55,8 @@
FIELD_PREP(MT_QFLAG_WED_RING, _n))
#define MT_NPU_Q_TX(_n) __MT_NPU_Q(MT76_WED_Q_TX, _n)
#define MT_NPU_Q_RX(_n) __MT_NPU_Q(MT76_WED_Q_RX, _n)
#define MT_NPU_Q_TXFREE(_n) (FIELD_PREP(MT_QFLAG_WED_TYPE, MT76_WED_Q_TXFREE) | \
FIELD_PREP(MT_QFLAG_WED_RING, _n))
struct mt76_dev;
struct mt76_phy;
@ -2003,6 +2005,14 @@ static inline bool mt76_queue_is_npu_rx(struct mt76_queue *q)
FIELD_GET(MT_QFLAG_WED_TYPE, q->flags) == MT76_WED_Q_RX;
}
static inline bool mt76_queue_is_npu_txfree(struct mt76_queue *q)
{
if (q->flags & MT_QFLAG_WED)
return false;
return FIELD_GET(MT_QFLAG_WED_TYPE, q->flags) == MT76_WED_Q_TXFREE;
}
struct mt76_txwi_cache *
mt76_token_release(struct mt76_dev *dev, int token, bool *wake);
int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi);

5
drivers/net/wireless/mediatek/mt76/mt7996/dma.c
View File

@ -756,6 +756,9 @@ int mt7996_dma_init(struct mt7996_dev *dev)
(is_mt7992(&dev->mt76)))) {
dev->mt76.q_rx[MT_RXQ_MAIN_WA].flags = MT_WED_Q_TXFREE;
dev->mt76.q_rx[MT_RXQ_MAIN_WA].wed = wed;
} else if (is_mt7992(&dev->mt76) &&
mt76_npu_device_active(&dev->mt76)) {
dev->mt76.q_rx[MT_RXQ_MAIN_WA].flags = MT_NPU_Q_TXFREE(0);
}
if (mt7996_has_wa(dev)) {
@ -888,6 +891,8 @@ int mt7996_dma_init(struct mt7996_dev *dev)
/* tx free notify event from WA for band0 */
dev->mt76.q_rx[MT_RXQ_TXFREE_BAND0].flags = MT_WED_Q_TXFREE;
dev->mt76.q_rx[MT_RXQ_TXFREE_BAND0].wed = wed;
} else if (mt76_npu_device_active(&dev->mt76)) {
dev->mt76.q_rx[MT_RXQ_TXFREE_BAND0].flags = MT_NPU_Q_TXFREE(0);
}
ret = mt76_queue_alloc(dev,

14
drivers/net/wireless/mediatek/mt76/mt7996/mac.c
View File

@ -2525,6 +2525,13 @@ void mt7996_mac_reset_work(struct work_struct *work)
mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
continue;
if (mt76_npu_device_active(&dev->mt76) &&
mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
continue;
if (mt76_queue_is_npu_txfree(&dev->mt76.q_rx[i]))
continue;
napi_disable(&dev->mt76.napi[i]);
}
napi_disable(&dev->mt76.tx_napi);
@ -2580,6 +2587,13 @@ void mt7996_mac_reset_work(struct work_struct *work)
mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
continue;
if (mt76_npu_device_active(&dev->mt76) &&
mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
continue;
if (mt76_queue_is_npu_txfree(&dev->mt76.q_rx[i]))
continue;
napi_enable(&dev->mt76.napi[i]);
local_bh_disable();
napi_schedule(&dev->mt76.napi[i]);