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wifi: rtw89: use firmware offload for PHY and RF batch register writes

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Use firmware offload to perform batch register writes for PHY and RF.
This reduces I/O operations, improves bus transfer efficiency, and
decreases hardware initialization time.

Performance improvement on USB 2.0 HCI:
- rtw89_phy_init_bb_reg: 61 ms -> 5 ms
- rtw89_phy_init_rf_reg: 587 ms -> 106 ms

Use offload-aware delay functions (do_udelay and do_mdelay) for the
delay calls in rtw89_phy_init_reg, rtw89_phy_config_rf_reg, and
rtw89_phy_config_rf_reg_v1 to ensure compatibility with batch register
writes.

Signed-off-by: Eric Huang <echuang@realtek.com>
Signed-off-by: Johnson Tsai <wenjie.tsai@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260420034051.17666-11-pkshih@realtek.com
This commit is contained in:
Eric Huang 2026-04-20 11:40:45 +08:00 committed by Ping-Ke Shih
parent 63586e841c
commit 850216ff7d
1 changed files with 26 additions and 12 deletions
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38
drivers/net/wireless/realtek/rtw89/phy.c
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@ -1352,17 +1352,17 @@ static void rtw89_phy_config_bb_reg(struct rtw89_dev *rtwdev,
u32 addr;
if (reg->addr == 0xfe) {
mdelay(50);
rtw89_io_mdelay(rtwdev, 50);
} else if (reg->addr == 0xfd) {
mdelay(5);
rtw89_io_mdelay(rtwdev, 5);
} else if (reg->addr == 0xfc) {
mdelay(1);
rtw89_io_mdelay(rtwdev, 1);
} else if (reg->addr == 0xfb) {
udelay(50);
rtw89_io_udelay(rtwdev, 50);
} else if (reg->addr == 0xfa) {
udelay(5);
rtw89_io_udelay(rtwdev, 5);
} else if (reg->addr == 0xf9) {
udelay(1);
rtw89_io_udelay(rtwdev, 1);
} else if (reg->data == BYPASS_CR_DATA) {
rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Bypass CR 0x%x\n", reg->addr);
} else {
@ -1692,17 +1692,17 @@ void rtw89_phy_config_rf_reg(struct rtw89_dev *rtwdev,
void *extra_data)
{
if (reg->addr == 0xfe) {
mdelay(50);
rtw89_io_mdelay(rtwdev, 50);
} else if (reg->addr == 0xfd) {
mdelay(5);
rtw89_io_mdelay(rtwdev, 5);
} else if (reg->addr == 0xfc) {
mdelay(1);
rtw89_io_mdelay(rtwdev, 1);
} else if (reg->addr == 0xfb) {
udelay(50);
rtw89_io_udelay(rtwdev, 50);
} else if (reg->addr == 0xfa) {
udelay(5);
rtw89_io_udelay(rtwdev, 5);
} else if (reg->addr == 0xf9) {
udelay(1);
rtw89_io_udelay(rtwdev, 1);
} else {
rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data);
rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path,
@ -1715,6 +1715,11 @@ void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev,
enum rtw89_rf_path rf_path,
void *extra_data)
{
if (reg->addr == 0xfe) {
rtw89_io_mdelay(rtwdev, 50);
return;
}
rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data);
if (reg->addr < 0x100)
@ -1885,11 +1890,16 @@ void rtw89_phy_init_bb_reg(struct rtw89_dev *rtwdev)
const struct rtw89_phy_table *bb_gain_table;
bb_table = elm_info->bb_tbl ? elm_info->bb_tbl : chip->bb_table;
rtw89_io_pack(rtwdev);
rtw89_phy_init_reg(rtwdev, bb_table, false, rtw89_phy_config_bb_reg, NULL);
if (rtwdev->dbcc_en)
rtw89_phy_init_reg(rtwdev, bb_table, false, rtw89_phy_config_bb_reg,
(void *)RTW89_PHY_1);
rtw89_io_unpack(rtwdev);
rtw89_chip_init_txpwr_unit(rtwdev);
bb_gain_table = elm_info->bb_gain ? elm_info->bb_gain : chip->bb_gain_table;
@ -2016,7 +2026,11 @@ void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev, bool noio)
else
config = rf_table->config ? rf_table->config :
rtw89_phy_config_rf_reg;
rtw89_io_pack(rtwdev);
rtw89_phy_init_reg(rtwdev, rf_table, by_acv, config, (void *)rf_reg_info);
rtw89_io_unpack(rtwdev);
if (rtw89_phy_config_rf_reg_fw(rtwdev, rf_reg_info))
rtw89_warn(rtwdev, "rf path %d reg h2c config failed\n",
rf_reg_info->rf_path);