arm64: dts: allwinner: a523: Move rgmii0 pins to correct location

Nodes are supposed to be sorted by address, or if no addresses
apply, by node name. The rgmii0 pins are out of order, possibly
due to multiple patches adding pin mux settings conflicting.

Move the rgmii0 pins to the correct location.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250628161608.3072968-4-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Chen-Yu Tsai 2025-06-29 00:16:06 +08:00
parent 6e2662c07a
commit 84c4a16e00

View File

@ -126,16 +126,6 @@ pio: pinctrl@2000000 {
interrupt-controller;
#interrupt-cells = <3>;
rgmii0_pins: rgmii0-pins {
pins = "PH0", "PH1", "PH2", "PH3", "PH4",
"PH5", "PH6", "PH7", "PH9", "PH10",
"PH14", "PH15", "PH16", "PH17", "PH18";
allwinner,pinmux = <5>;
function = "emac0";
drive-strength = <40>;
bias-disable;
};
mmc0_pins: mmc0-pins {
pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";
allwinner,pinmux = <2>;
@ -163,6 +153,16 @@ mmc2_pins: mmc2-pins {
bias-pull-up;
};
rgmii0_pins: rgmii0-pins {
pins = "PH0", "PH1", "PH2", "PH3", "PH4",
"PH5", "PH6", "PH7", "PH9", "PH10",
"PH14", "PH15", "PH16", "PH17", "PH18";
allwinner,pinmux = <5>;
function = "emac0";
drive-strength = <40>;
bias-disable;
};
uart0_pb_pins: uart0-pb-pins {
pins = "PB9", "PB10";
allwinner,pinmux = <2>;