i.MX new clock additions for 4.17:

- New clocks for i.MX7D SNVS, CAAM and Keypad.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJapyj2AAoJEFBXWFqHsHzOY+gH/2R1hXzo9ldl2DUGA59//iZV
 0D3T3eAFegjcT/noQ1Jj/cS6d9qsbIpSDrHYBFb5qb6k4dwNnPXv4eD/P7n2gv3K
 4PkCrsjDSqRDsU5X/vuodznVIZYFs08mE6vLKd+BGu9YfDo/0OVh0wNBZEknuUOg
 vNuRQp4R/r5AfH6CrNAn8qacoWn9VIGHeAQwghQNTD1uPnKYKxeCh0iJl7FuS/Jy
 PX62bU1KecrCJuyW15KupqWRg/r76rDA2YfO+Dyve0I7C3QuMYDRPXtT2iuWVs6U
 JckS0f3ismVaRGCg+bhN9ajXFh/aM5Lh7aO3igeWdZjT6wAZwc5X3ttjnN0R1BM=
 =RtJW
 -----END PGP SIGNATURE-----

Merge tag 'clk-imx-4.17-newid' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx

Pull i.MX new clock additions from Shawn Guo:

 - New clocks for i.MX7D SNVS, CAAM and Keypad.

* tag 'clk-imx-4.17-newid' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx: imx7d: add the Keypad Port module clock
  clk: imx7d: add CAAM clock
  clk: imx: imx7d: add the snvs clock
This commit is contained in:
Stephen Boyd 2018-03-14 15:12:31 -07:00
commit 84b7bbacd8
2 changed files with 7 additions and 1 deletions

View File

@ -795,6 +795,8 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
clks[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = imx_clk_gate4("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0);
clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0);
clks[IMX7D_OCOTP_CLK] = imx_clk_gate4("ocotp_clk", "ipg_root_clk", base + 0x4230, 0);
clks[IMX7D_SNVS_CLK] = imx_clk_gate4("snvs_clk", "ipg_root_clk", base + 0x4250, 0);
clks[IMX7D_CAAM_CLK] = imx_clk_gate4("caam_clk", "ipg_root_clk", base + 0x4240, 0);
clks[IMX7D_USB_HSIC_ROOT_CLK] = imx_clk_gate4("usb_hsic_root_clk", "usb_hsic_post_div", base + 0x4420, 0);
clks[IMX7D_SDMA_CORE_CLK] = imx_clk_gate4("sdma_root_clk", "ahb_root_clk", base + 0x4480, 0);
clks[IMX7D_PCIE_CTRL_ROOT_CLK] = imx_clk_gate4("pcie_ctrl_root_clk", "pcie_ctrl_post_div", base + 0x4600, 0);
@ -857,6 +859,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
clks[IMX7D_WDOG2_ROOT_CLK] = imx_clk_gate4("wdog2_root_clk", "wdog_post_div", base + 0x49d0, 0);
clks[IMX7D_WDOG3_ROOT_CLK] = imx_clk_gate4("wdog3_root_clk", "wdog_post_div", base + 0x49e0, 0);
clks[IMX7D_WDOG4_ROOT_CLK] = imx_clk_gate4("wdog4_root_clk", "wdog_post_div", base + 0x49f0, 0);
clks[IMX7D_KPP_ROOT_CLK] = imx_clk_gate4("kpp_root_clk", "ipg_root_clk", base + 0x4aa0, 0);
clks[IMX7D_CSI_MCLK_ROOT_CLK] = imx_clk_gate4("csi_mclk_root_clk", "csi_mclk_post_div", base + 0x4490, 0);
clks[IMX7D_AUDIO_MCLK_ROOT_CLK] = imx_clk_gate4("audio_mclk_root_clk", "audio_mclk_post_div", base + 0x4790, 0);
clks[IMX7D_WRCLK_ROOT_CLK] = imx_clk_gate4("wrclk_root_clk", "wrclk_post_div", base + 0x47a0, 0);

View File

@ -452,5 +452,8 @@
#define IMX7D_OCOTP_CLK 439
#define IMX7D_NAND_RAWNAND_CLK 440
#define IMX7D_NAND_USDHC_BUS_RAWNAND_CLK 441
#define IMX7D_CLK_END 442
#define IMX7D_SNVS_CLK 442
#define IMX7D_CAAM_CLK 443
#define IMX7D_KPP_ROOT_CLK 444
#define IMX7D_CLK_END 445
#endif /* __DT_BINDINGS_CLOCK_IMX7D_H */