mirror of
https://github.com/torvalds/linux.git
synced 2026-05-30 01:53:29 +02:00
thunderbolt: Fixes for v6.7-rc3
This includes following USB4/Thunderbolt fixes for v6.7-rc3:
- Fix a lane bonding issue on ASMedia USB4 device
- Send uevents when link is switched to asymmetric or symmetric
- Only add device router DP IN adapters to the head of resource list
to avoid issues during system resume.
All these have been in linux-next with no reported issues.
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Merge tag 'thunderbolt-for-v6.7-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-linus
Mika writes:
thunderbolt: Fixes for v6.7-rc3
This includes following USB4/Thunderbolt fixes for v6.7-rc3:
- Fix a lane bonding issue on ASMedia USB4 device
- Send uevents when link is switched to asymmetric or symmetric
- Only add device router DP IN adapters to the head of resource list
to avoid issues during system resume.
All these have been in linux-next with no reported issues.
* tag 'thunderbolt-for-v6.7-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (1451 commits)
thunderbolt: Only add device router DP IN to the head of the DP resource list
thunderbolt: Send uevent after asymmetric/symmetric switch
thunderbolt: Set lane bonding bit only for downstream port
This commit is contained in:
Greg Kroah-Hartman
commit
849d3f985e
|
|
@ -2227,7 +2227,7 @@
|
|||
forcing Dual Address Cycle for PCI cards supporting
|
||||
greater than 32-bit addressing.
|
||||
|
||||
iommu.strict= [ARM64, X86] Configure TLB invalidation behaviour
|
||||
iommu.strict= [ARM64, X86, S390] Configure TLB invalidation behaviour
|
||||
Format: { "0" | "1" }
|
||||
0 - Lazy mode.
|
||||
Request that DMA unmap operations use deferred
|
||||
|
|
@ -3596,6 +3596,13 @@
|
|||
[NFS] set the TCP port on which the NFSv4 callback
|
||||
channel should listen.
|
||||
|
||||
nfs.delay_retrans=
|
||||
[NFS] specifies the number of times the NFSv4 client
|
||||
retries the request before returning an EAGAIN error,
|
||||
after a reply of NFS4ERR_DELAY from the server.
|
||||
Only applies if the softerr mount option is enabled,
|
||||
and the specified value is >= 0.
|
||||
|
||||
nfs.enable_ino64=
|
||||
[NFS] enable 64-bit inode numbers.
|
||||
If zero, the NFS client will fake up a 32-bit inode
|
||||
|
|
@ -5687,9 +5694,10 @@
|
|||
s390_iommu= [HW,S390]
|
||||
Set s390 IOTLB flushing mode
|
||||
strict
|
||||
With strict flushing every unmap operation will result in
|
||||
an IOTLB flush. Default is lazy flushing before reuse,
|
||||
which is faster.
|
||||
With strict flushing every unmap operation will result
|
||||
in an IOTLB flush. Default is lazy flushing before
|
||||
reuse, which is faster. Deprecated, equivalent to
|
||||
iommu.strict=1.
|
||||
|
||||
s390_iommu_aperture= [KNL,S390]
|
||||
Specifies the size of the per device DMA address space
|
||||
|
|
|
|||
374
Documentation/admin-guide/media/mgb4.rst
Normal file
374
Documentation/admin-guide/media/mgb4.rst
Normal file
|
|
@ -0,0 +1,374 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
====================
|
||||
mgb4 sysfs interface
|
||||
====================
|
||||
|
||||
The mgb4 driver provides a sysfs interface, that is used to configure video
|
||||
stream related parameters (some of them must be set properly before the v4l2
|
||||
device can be opened) and obtain the video device/stream status.
|
||||
|
||||
There are two types of parameters - global / PCI card related, found under
|
||||
``/sys/class/video4linux/videoX/device`` and module specific found under
|
||||
``/sys/class/video4linux/videoX``.
|
||||
|
||||
|
||||
Global (PCI card) parameters
|
||||
============================
|
||||
|
||||
**module_type** (R):
|
||||
Module type.
|
||||
|
||||
| 0 - No module present
|
||||
| 1 - FPDL3
|
||||
| 2 - GMSL
|
||||
|
||||
**module_version** (R):
|
||||
Module version number. Zero in case of a missing module.
|
||||
|
||||
**fw_type** (R):
|
||||
Firmware type.
|
||||
|
||||
| 1 - FPDL3
|
||||
| 2 - GMSL
|
||||
|
||||
**fw_version** (R):
|
||||
Firmware version number.
|
||||
|
||||
**serial_number** (R):
|
||||
Card serial number. The format is::
|
||||
|
||||
PRODUCT-REVISION-SERIES-SERIAL
|
||||
|
||||
where each component is a 8b number.
|
||||
|
||||
|
||||
Common FPDL3/GMSL input parameters
|
||||
==================================
|
||||
|
||||
**input_id** (R):
|
||||
Input number ID, zero based.
|
||||
|
||||
**oldi_lane_width** (RW):
|
||||
Number of deserializer output lanes.
|
||||
|
||||
| 0 - single
|
||||
| 1 - dual (default)
|
||||
|
||||
**color_mapping** (RW):
|
||||
Mapping of the incoming bits in the signal to the colour bits of the pixels.
|
||||
|
||||
| 0 - OLDI/JEIDA
|
||||
| 1 - SPWG/VESA (default)
|
||||
|
||||
**link_status** (R):
|
||||
Video link status. If the link is locked, chips are properly connected and
|
||||
communicating at the same speed and protocol. The link can be locked without
|
||||
an active video stream.
|
||||
|
||||
A value of 0 is equivalent to the V4L2_IN_ST_NO_SYNC flag of the V4L2
|
||||
VIDIOC_ENUMINPUT status bits.
|
||||
|
||||
| 0 - unlocked
|
||||
| 1 - locked
|
||||
|
||||
**stream_status** (R):
|
||||
Video stream status. A stream is detected if the link is locked, the input
|
||||
pixel clock is running and the DE signal is moving.
|
||||
|
||||
A value of 0 is equivalent to the V4L2_IN_ST_NO_SIGNAL flag of the V4L2
|
||||
VIDIOC_ENUMINPUT status bits.
|
||||
|
||||
| 0 - not detected
|
||||
| 1 - detected
|
||||
|
||||
**video_width** (R):
|
||||
Video stream width. This is the actual width as detected by the HW.
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in the width
|
||||
field of the v4l2_bt_timings struct.
|
||||
|
||||
**video_height** (R):
|
||||
Video stream height. This is the actual height as detected by the HW.
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in the height
|
||||
field of the v4l2_bt_timings struct.
|
||||
|
||||
**vsync_status** (R):
|
||||
The type of VSYNC pulses as detected by the video format detector.
|
||||
|
||||
The value is equivalent to the flags returned by VIDIOC_QUERY_DV_TIMINGS in
|
||||
the polarities field of the v4l2_bt_timings struct.
|
||||
|
||||
| 0 - active low
|
||||
| 1 - active high
|
||||
| 2 - not available
|
||||
|
||||
**hsync_status** (R):
|
||||
The type of HSYNC pulses as detected by the video format detector.
|
||||
|
||||
The value is equivalent to the flags returned by VIDIOC_QUERY_DV_TIMINGS in
|
||||
the polarities field of the v4l2_bt_timings struct.
|
||||
|
||||
| 0 - active low
|
||||
| 1 - active high
|
||||
| 2 - not available
|
||||
|
||||
**vsync_gap_length** (RW):
|
||||
If the incoming video signal does not contain synchronization VSYNC and
|
||||
HSYNC pulses, these must be generated internally in the FPGA to achieve
|
||||
the correct frame ordering. This value indicates, how many "empty" pixels
|
||||
(pixels with deasserted Data Enable signal) are necessary to generate the
|
||||
internal VSYNC pulse.
|
||||
|
||||
**hsync_gap_length** (RW):
|
||||
If the incoming video signal does not contain synchronization VSYNC and
|
||||
HSYNC pulses, these must be generated internally in the FPGA to achieve
|
||||
the correct frame ordering. This value indicates, how many "empty" pixels
|
||||
(pixels with deasserted Data Enable signal) are necessary to generate the
|
||||
internal HSYNC pulse. The value must be greater than 1 and smaller than
|
||||
vsync_gap_length.
|
||||
|
||||
**pclk_frequency** (R):
|
||||
Input pixel clock frequency in kHz.
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
|
||||
the pixelclock field of the v4l2_bt_timings struct.
|
||||
|
||||
*Note: The frequency_range parameter must be set properly first to get
|
||||
a valid frequency here.*
|
||||
|
||||
**hsync_width** (R):
|
||||
Width of the HSYNC signal in PCLK clock ticks.
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
|
||||
the hsync field of the v4l2_bt_timings struct.
|
||||
|
||||
**vsync_width** (R):
|
||||
Width of the VSYNC signal in PCLK clock ticks.
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
|
||||
the vsync field of the v4l2_bt_timings struct.
|
||||
|
||||
**hback_porch** (R):
|
||||
Number of PCLK pulses between deassertion of the HSYNC signal and the first
|
||||
valid pixel in the video line (marked by DE=1).
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
|
||||
the hbackporch field of the v4l2_bt_timings struct.
|
||||
|
||||
**hfront_porch** (R):
|
||||
Number of PCLK pulses between the end of the last valid pixel in the video
|
||||
line (marked by DE=1) and assertion of the HSYNC signal.
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
|
||||
the hfrontporch field of the v4l2_bt_timings struct.
|
||||
|
||||
**vback_porch** (R):
|
||||
Number of video lines between deassertion of the VSYNC signal and the video
|
||||
line with the first valid pixel (marked by DE=1).
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
|
||||
the vbackporch field of the v4l2_bt_timings struct.
|
||||
|
||||
**vfront_porch** (R):
|
||||
Number of video lines between the end of the last valid pixel line (marked
|
||||
by DE=1) and assertion of the VSYNC signal.
|
||||
|
||||
The value is identical to what VIDIOC_QUERY_DV_TIMINGS returns in
|
||||
the vfrontporch field of the v4l2_bt_timings struct.
|
||||
|
||||
**frequency_range** (RW)
|
||||
PLL frequency range of the OLDI input clock generator. The PLL frequency is
|
||||
derived from the Pixel Clock Frequency (PCLK) and is equal to PCLK if
|
||||
oldi_lane_width is set to "single" and PCLK/2 if oldi_lane_width is set to
|
||||
"dual".
|
||||
|
||||
| 0 - PLL < 50MHz (default)
|
||||
| 1 - PLL >= 50MHz
|
||||
|
||||
*Note: This parameter can not be changed while the input v4l2 device is
|
||||
open.*
|
||||
|
||||
|
||||
Common FPDL3/GMSL output parameters
|
||||
===================================
|
||||
|
||||
**output_id** (R):
|
||||
Output number ID, zero based.
|
||||
|
||||
**video_source** (RW):
|
||||
Output video source. If set to 0 or 1, the source is the corresponding card
|
||||
input and the v4l2 output devices are disabled. If set to 2 or 3, the source
|
||||
is the corresponding v4l2 video output device. The default is
|
||||
the corresponding v4l2 output, i.e. 2 for OUT1 and 3 for OUT2.
|
||||
|
||||
| 0 - input 0
|
||||
| 1 - input 1
|
||||
| 2 - v4l2 output 0
|
||||
| 3 - v4l2 output 1
|
||||
|
||||
*Note: This parameter can not be changed while ANY of the input/output v4l2
|
||||
devices is open.*
|
||||
|
||||
**display_width** (RW):
|
||||
Display width. There is no autodetection of the connected display, so the
|
||||
proper value must be set before the start of streaming. The default width
|
||||
is 1280.
|
||||
|
||||
*Note: This parameter can not be changed while the output v4l2 device is
|
||||
open.*
|
||||
|
||||
**display_height** (RW):
|
||||
Display height. There is no autodetection of the connected display, so the
|
||||
proper value must be set before the start of streaming. The default height
|
||||
is 640.
|
||||
|
||||
*Note: This parameter can not be changed while the output v4l2 device is
|
||||
open.*
|
||||
|
||||
**frame_rate** (RW):
|
||||
Output video frame rate in frames per second. The default frame rate is
|
||||
60Hz.
|
||||
|
||||
**hsync_polarity** (RW):
|
||||
HSYNC signal polarity.
|
||||
|
||||
| 0 - active low (default)
|
||||
| 1 - active high
|
||||
|
||||
**vsync_polarity** (RW):
|
||||
VSYNC signal polarity.
|
||||
|
||||
| 0 - active low (default)
|
||||
| 1 - active high
|
||||
|
||||
**de_polarity** (RW):
|
||||
DE signal polarity.
|
||||
|
||||
| 0 - active low
|
||||
| 1 - active high (default)
|
||||
|
||||
**pclk_frequency** (RW):
|
||||
Output pixel clock frequency. Allowed values are between 25000-190000(kHz)
|
||||
and there is a non-linear stepping between two consecutive allowed
|
||||
frequencies. The driver finds the nearest allowed frequency to the given
|
||||
value and sets it. When reading this property, you get the exact
|
||||
frequency set by the driver. The default frequency is 70000kHz.
|
||||
|
||||
*Note: This parameter can not be changed while the output v4l2 device is
|
||||
open.*
|
||||
|
||||
**hsync_width** (RW):
|
||||
Width of the HSYNC signal in pixels. The default value is 16.
|
||||
|
||||
**vsync_width** (RW):
|
||||
Width of the VSYNC signal in video lines. The default value is 2.
|
||||
|
||||
**hback_porch** (RW):
|
||||
Number of PCLK pulses between deassertion of the HSYNC signal and the first
|
||||
valid pixel in the video line (marked by DE=1). The default value is 32.
|
||||
|
||||
**hfront_porch** (RW):
|
||||
Number of PCLK pulses between the end of the last valid pixel in the video
|
||||
line (marked by DE=1) and assertion of the HSYNC signal. The default value
|
||||
is 32.
|
||||
|
||||
**vback_porch** (RW):
|
||||
Number of video lines between deassertion of the VSYNC signal and the video
|
||||
line with the first valid pixel (marked by DE=1). The default value is 2.
|
||||
|
||||
**vfront_porch** (RW):
|
||||
Number of video lines between the end of the last valid pixel line (marked
|
||||
by DE=1) and assertion of the VSYNC signal. The default value is 2.
|
||||
|
||||
|
||||
FPDL3 specific input parameters
|
||||
===============================
|
||||
|
||||
**fpdl3_input_width** (RW):
|
||||
Number of deserializer input lines.
|
||||
|
||||
| 0 - auto (default)
|
||||
| 1 - single
|
||||
| 2 - dual
|
||||
|
||||
FPDL3 specific output parameters
|
||||
================================
|
||||
|
||||
**fpdl3_output_width** (RW):
|
||||
Number of serializer output lines.
|
||||
|
||||
| 0 - auto (default)
|
||||
| 1 - single
|
||||
| 2 - dual
|
||||
|
||||
GMSL specific input parameters
|
||||
==============================
|
||||
|
||||
**gmsl_mode** (RW):
|
||||
GMSL speed mode.
|
||||
|
||||
| 0 - 12Gb/s (default)
|
||||
| 1 - 6Gb/s
|
||||
| 2 - 3Gb/s
|
||||
| 3 - 1.5Gb/s
|
||||
|
||||
**gmsl_stream_id** (RW):
|
||||
The GMSL multi-stream contains up to four video streams. This parameter
|
||||
selects which stream is captured by the video input. The value is the
|
||||
zero-based index of the stream. The default stream id is 0.
|
||||
|
||||
*Note: This parameter can not be changed while the input v4l2 device is
|
||||
open.*
|
||||
|
||||
**gmsl_fec** (RW):
|
||||
GMSL Forward Error Correction (FEC).
|
||||
|
||||
| 0 - disabled
|
||||
| 1 - enabled (default)
|
||||
|
||||
|
||||
====================
|
||||
mgb4 mtd partitions
|
||||
====================
|
||||
|
||||
The mgb4 driver creates a MTD device with two partitions:
|
||||
- mgb4-fw.X - FPGA firmware.
|
||||
- mgb4-data.X - Factory settings, e.g. card serial number.
|
||||
|
||||
The *mgb4-fw* partition is writable and is used for FW updates, *mgb4-data* is
|
||||
read-only. The *X* attached to the partition name represents the card number.
|
||||
Depending on the CONFIG_MTD_PARTITIONED_MASTER kernel configuration, you may
|
||||
also have a third partition named *mgb4-flash* available in the system. This
|
||||
partition represents the whole, unpartitioned, card's FLASH memory and one should
|
||||
not fiddle with it...
|
||||
|
||||
====================
|
||||
mgb4 iio (triggers)
|
||||
====================
|
||||
|
||||
The mgb4 driver creates an Industrial I/O (IIO) device that provides trigger and
|
||||
signal level status capability. The following scan elements are available:
|
||||
|
||||
**activity**:
|
||||
The trigger levels and pending status.
|
||||
|
||||
| bit 1 - trigger 1 pending
|
||||
| bit 2 - trigger 2 pending
|
||||
| bit 5 - trigger 1 level
|
||||
| bit 6 - trigger 2 level
|
||||
|
||||
**timestamp**:
|
||||
The trigger event timestamp.
|
||||
|
||||
The iio device can operate either in "raw" mode where you can fetch the signal
|
||||
levels (activity bits 5 and 6) using sysfs access or in triggered buffer mode.
|
||||
In the triggered buffer mode you can follow the signal level changes (activity
|
||||
bits 1 and 2) using the iio device in /dev. If you enable the timestamps, you
|
||||
will also get the exact trigger event time that can be matched to a video frame
|
||||
(every mgb4 video frame has a timestamp with the same clock source).
|
||||
|
||||
*Note: although the activity sample always contains all the status bits, it makes
|
||||
no sense to get the pending bits in raw mode or the level bits in the triggered
|
||||
buffer mode - the values do not represent valid data in such case.*
|
||||
|
|
@ -77,6 +77,7 @@ ipu3-cio2 Intel ipu3-cio2 driver
|
|||
ivtv Conexant cx23416/cx23415 MPEG encoder/decoder
|
||||
ivtvfb Conexant cx23415 framebuffer
|
||||
mantis MANTIS based cards
|
||||
mgb4 Digiteq Automotive MGB4 frame grabber
|
||||
mxb Siemens-Nixdorf 'Multimedia eXtension Board'
|
||||
netup-unidvb NetUP Universal DVB card
|
||||
ngene Micronas nGene
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@ Video4Linux (V4L) driver-specific documentation
|
|||
imx7
|
||||
ipu3
|
||||
ivtv
|
||||
mgb4
|
||||
omap3isp
|
||||
omap4_camera
|
||||
philips
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ The trace events are defined on a per-codec basis, e.g.:
|
|||
|
||||
.. code-block:: bash
|
||||
|
||||
$ ls /sys/kernel/debug/tracing/events/ | grep visl
|
||||
$ ls /sys/kernel/tracing/events/ | grep visl
|
||||
visl_fwht_controls
|
||||
visl_h264_controls
|
||||
visl_hevc_controls
|
||||
|
|
@ -90,13 +90,13 @@ For example, in order to dump HEVC SPS data:
|
|||
|
||||
.. code-block:: bash
|
||||
|
||||
$ echo 1 > /sys/kernel/debug/tracing/events/visl_hevc_controls/v4l2_ctrl_hevc_sps/enable
|
||||
$ echo 1 > /sys/kernel/tracing/events/visl_hevc_controls/v4l2_ctrl_hevc_sps/enable
|
||||
|
||||
The SPS data will be dumped to the trace buffer, i.e.:
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ cat /sys/kernel/debug/tracing/trace
|
||||
$ cat /sys/kernel/tracing/trace
|
||||
video_parameter_set_id 0
|
||||
seq_parameter_set_id 0
|
||||
pic_width_in_luma_samples 1920
|
||||
|
|
|
|||
|
|
@ -174,7 +174,7 @@ HWCAP2_DCPODP
|
|||
Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
|
||||
|
||||
HWCAP2_SVE2
|
||||
Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.
|
||||
Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0001.
|
||||
|
||||
HWCAP2_SVEAES
|
||||
Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.
|
||||
|
|
@ -222,7 +222,7 @@ HWCAP2_RNG
|
|||
Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.
|
||||
|
||||
HWCAP2_BTI
|
||||
Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.
|
||||
Functionality implied by ID_AA64PFR1_EL1.BT == 0b0001.
|
||||
|
||||
HWCAP2_MTE
|
||||
Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described
|
||||
|
|
@ -232,7 +232,7 @@ HWCAP2_ECV
|
|||
Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.
|
||||
|
||||
HWCAP2_AFP
|
||||
Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.
|
||||
Functionality implied by ID_AA64MMFR1_EL1.AFP == 0b0001.
|
||||
|
||||
HWCAP2_RPRES
|
||||
Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
|
||||
|
|
|
|||
|
|
@ -77,6 +77,9 @@ The following keys are defined:
|
|||
* :c:macro:`RISCV_HWPROBE_EXT_ZBS`: The Zbs extension is supported, as defined
|
||||
in version 1.0 of the Bit-Manipulation ISA extensions.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Zicboz extension is supported, as
|
||||
ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
|
||||
information about the selected set of processors.
|
||||
|
||||
|
|
@ -96,3 +99,6 @@ The following keys are defined:
|
|||
|
||||
* :c:macro:`RISCV_HWPROBE_MISALIGNED_UNSUPPORTED`: Misaligned accesses are
|
||||
not supported at all and will generate a misaligned address fault.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which
|
||||
represents the size of the Zicboz block in bytes.
|
||||
|
|
|
|||
|
|
@ -42,6 +42,26 @@ An example string following the order is::
|
|||
|
||||
rv64imadc_zifoo_zigoo_zafoo_sbar_scar_zxmbaz_xqux_xrux
|
||||
|
||||
"isa" and "hart isa" lines in /proc/cpuinfo
|
||||
-------------------------------------------
|
||||
|
||||
The "isa" line in /proc/cpuinfo describes the lowest common denominator of
|
||||
RISC-V ISA extensions recognized by the kernel and implemented on all harts. The
|
||||
"hart isa" line, in contrast, describes the set of extensions recognized by the
|
||||
kernel on the particular hart being described, even if those extensions may not
|
||||
be present on all harts in the system.
|
||||
|
||||
In both lines, the presence of an extension guarantees only that the hardware
|
||||
has the described capability. Additional kernel support or policy changes may be
|
||||
required before an extension's capability is fully usable by userspace programs.
|
||||
Similarly, for S-mode extensions, presence in one of these lines does not
|
||||
guarantee that the kernel is taking advantage of the extension, or that the
|
||||
feature will be visible in guest VMs managed by this kernel.
|
||||
|
||||
Inversely, the absence of an extension in these lines does not necessarily mean
|
||||
the hardware does not support that feature. The running kernel may not recognize
|
||||
the extension, or may have deliberately removed it from the listing.
|
||||
|
||||
Misaligned accesses
|
||||
-------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -37,16 +37,14 @@ prototype in a header for the wrapper kfunc.
|
|||
An example is given below::
|
||||
|
||||
/* Disables missing prototype warnings */
|
||||
__diag_push();
|
||||
__diag_ignore_all("-Wmissing-prototypes",
|
||||
"Global kfuncs as their definitions will be in BTF");
|
||||
__bpf_kfunc_start_defs();
|
||||
|
||||
__bpf_kfunc struct task_struct *bpf_find_get_task_by_vpid(pid_t nr)
|
||||
{
|
||||
return find_get_task_by_vpid(nr);
|
||||
}
|
||||
|
||||
__diag_pop();
|
||||
__bpf_kfunc_end_defs();
|
||||
|
||||
A wrapper kfunc is often needed when we need to annotate parameters of the
|
||||
kfunc. Otherwise one may directly make the kfunc visible to the BPF program by
|
||||
|
|
|
|||
|
|
@ -0,0 +1,130 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas SH-Mobile LCD Controller (LCDC)
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
||||
- Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- renesas,r8a7740-lcdc # R-Mobile A1
|
||||
- renesas,sh73a0-lcdc # SH-Mobile AG5
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
description:
|
||||
Only the functional clock is mandatory.
|
||||
Some of the optional clocks are model-dependent (e.g. "video" (a.k.a.
|
||||
"vou" or "dv_clk") is available on R-Mobile A1 only).
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: fck
|
||||
- enum: [ media, lclk, hdmi, video ]
|
||||
- enum: [ media, lclk, hdmi, video ]
|
||||
- enum: [ media, lclk, hdmi, video ]
|
||||
- enum: [ media, lclk, hdmi, video ]
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: LCD port (R-Mobile A1 and SH-Mobile AG5)
|
||||
unevaluatedProperties: false
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: HDMI port (R-Mobile A1 LCDC1 and SH-Mobile AG5)
|
||||
unevaluatedProperties: false
|
||||
|
||||
port@2:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: MIPI-DSI port (SH-Mobile AG5)
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,r8a7740-lcdc
|
||||
then:
|
||||
properties:
|
||||
ports:
|
||||
properties:
|
||||
port@2: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,sh73a0-lcdc
|
||||
then:
|
||||
properties:
|
||||
ports:
|
||||
required:
|
||||
- port@1
|
||||
- port@2
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r8a7740-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
lcd-controller@fe940000 {
|
||||
compatible = "renesas,r8a7740-lcdc";
|
||||
reg = <0xfe940000 0x4000>;
|
||||
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp1_clks R8A7740_CLK_LCDC0>,
|
||||
<&cpg_clocks R8A7740_CLK_M3>, <&lcdlclk0_clk>,
|
||||
<&vou_clk>;
|
||||
clock-names = "fck", "media", "lclk", "video";
|
||||
power-domains = <&pd_a4lc>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
lcdc0_rgb: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -11,10 +11,10 @@ maintainers:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
- enum:
|
||||
- solomon,ssd1322
|
||||
- solomon,ssd1325
|
||||
- solomon,ssd1327
|
||||
enum:
|
||||
- solomon,ssd1322
|
||||
- solomon,ssd1325
|
||||
- solomon,ssd1327
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -24,6 +24,8 @@ properties:
|
|||
linux,keycodes:
|
||||
maxItems: 1
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- linux,keycodes
|
||||
|
|
|
|||
|
|
@ -34,6 +34,9 @@ properties:
|
|||
vdd-supply:
|
||||
description: Regulator for voltage.
|
||||
|
||||
vddio-supply:
|
||||
description: Optional Regulator for I/O voltage.
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -110,6 +110,7 @@ properties:
|
|||
- qcom,sdm630-smmu-v2
|
||||
- qcom,sdm845-smmu-v2
|
||||
- qcom,sm6350-smmu-v2
|
||||
- qcom,sm7150-smmu-v2
|
||||
- const: qcom,adreno-smmu
|
||||
- const: qcom,smmu-v2
|
||||
- description: Qcom Adreno GPUs on Google Cheza platform
|
||||
|
|
@ -409,6 +410,7 @@ allOf:
|
|||
contains:
|
||||
enum:
|
||||
- qcom,sm6350-smmu-v2
|
||||
- qcom,sm7150-smmu-v2
|
||||
- qcom,sm8150-smmu-500
|
||||
- qcom,sm8250-smmu-500
|
||||
then:
|
||||
|
|
|
|||
|
|
@ -15,7 +15,10 @@ description:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
const: pwm-ir-tx
|
||||
oneOf:
|
||||
- const: pwm-ir-tx
|
||||
- const: nokia,n900-ir
|
||||
deprecated: true
|
||||
|
||||
pwms:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@ properties:
|
|||
- amlogic,meson6-ir
|
||||
- amlogic,meson8b-ir
|
||||
- amlogic,meson-gxbb-ir
|
||||
- amlogic,meson-s4-ir
|
||||
- items:
|
||||
- const: amlogic,meson-gx-ir
|
||||
- const: amlogic,meson-gxbb-ir
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- starfive,jh7110-csi2rx
|
||||
- ti,j721e-csi2rx
|
||||
- const: cdns,csi2rx
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -14,6 +14,9 @@ description: |-
|
|||
interface and CCI (I2C compatible) control bus. The output format
|
||||
is raw Bayer.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/media/video-interface-devices.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: hynix,hi846
|
||||
|
|
@ -86,7 +89,7 @@ required:
|
|||
- vddd-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
@ -109,6 +112,8 @@ examples:
|
|||
vddio-supply = <®_camera_vddio>;
|
||||
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
||||
shutdown-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
|
||||
orientation = <0>;
|
||||
rotation = <0>;
|
||||
|
||||
port {
|
||||
camera_out: endpoint {
|
||||
|
|
|
|||
114
Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml
Normal file
114
Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/i2c/onnn,mt9m114.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: onsemi 1/6-inch 720p CMOS Digital Image Sensor
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
|
||||
description: |-
|
||||
The onsemi MT9M114 is a 1/6-inch 720p (1.26 Mp) CMOS digital image sensor
|
||||
with an active pixel-array size of 1296H x 976V. It is programmable through
|
||||
an I2C interface and outputs image data over a 8-bit parallel or 1-lane MIPI
|
||||
CSI-2 connection.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: onnn,mt9m114
|
||||
|
||||
reg:
|
||||
description: I2C device address
|
||||
enum:
|
||||
- 0x48
|
||||
- 0x5d
|
||||
|
||||
clocks:
|
||||
description: EXTCLK clock signal
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
Core digital voltage supply, 1.8V
|
||||
|
||||
vddio-supply:
|
||||
description:
|
||||
I/O digital voltage supply, 1.8V or 2.8V
|
||||
|
||||
vaa-supply:
|
||||
description:
|
||||
Analog voltage supply, 2.8V
|
||||
|
||||
reset-gpios:
|
||||
description: |-
|
||||
Reference to the GPIO connected to the RESET_BAR pin, if any (active
|
||||
low).
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
bus-type:
|
||||
enum: [4, 5, 6]
|
||||
|
||||
link-frequencies: true
|
||||
remote-endpoint: true
|
||||
|
||||
# The number and mapping of lanes (for CSI-2), and the bus width and
|
||||
# signal polarities (for parallel and BT.656) are fixed and must not
|
||||
# be specified.
|
||||
|
||||
required:
|
||||
- bus-type
|
||||
- link-frequencies
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- vdd-supply
|
||||
- vddio-supply
|
||||
- vaa-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/media/video-interfaces.h>
|
||||
|
||||
i2c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sensor@48 {
|
||||
compatible = "onnn,mt9m114";
|
||||
reg = <0x48>;
|
||||
|
||||
clocks = <&clk24m 0>;
|
||||
|
||||
reset-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
|
||||
|
||||
vddio-supply = <®_cam_1v8>;
|
||||
vdd-supply = <®_cam_1v8>;
|
||||
vaa-supply = <®_2p8v>;
|
||||
|
||||
port {
|
||||
endpoint {
|
||||
bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
|
||||
link-frequencies = /bits/ 64 <384000000>;
|
||||
remote-endpoint = <&mipi_csi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -68,12 +68,6 @@ properties:
|
|||
marked GPIO_ACTIVE_LOW.
|
||||
maxItems: 1
|
||||
|
||||
rotation:
|
||||
enum:
|
||||
- 0 # Sensor Mounted Upright
|
||||
- 180 # Sensor Mounted Upside Down
|
||||
default: 0
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
|
@ -114,7 +108,7 @@ required:
|
|||
- reset-gpios
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -52,10 +52,6 @@ properties:
|
|||
description:
|
||||
GPIO connected to the reset pin (active low)
|
||||
|
||||
orientation: true
|
||||
|
||||
rotation: true
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
|
@ -95,7 +91,7 @@ required:
|
|||
- dvdd-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -44,11 +44,6 @@ properties:
|
|||
description: >
|
||||
Reference to the GPIO connected to the reset pin, if any.
|
||||
|
||||
rotation:
|
||||
enum:
|
||||
- 0
|
||||
- 180
|
||||
|
||||
port:
|
||||
description: Digital Output Port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
|
|
@ -85,7 +80,7 @@ required:
|
|||
- DOVDD-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
141
Documentation/devicetree/bindings/media/i2c/ovti,ov5642.yaml
Normal file
141
Documentation/devicetree/bindings/media/i2c/ovti,ov5642.yaml
Normal file
|
|
@ -0,0 +1,141 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/i2c/ovti,ov5642.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: OmniVision OV5642 Image Sensor
|
||||
|
||||
maintainers:
|
||||
- Fabio Estevam <festevam@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/media/video-interface-devices.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ovti,ov5642
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: XCLK Input Clock
|
||||
|
||||
AVDD-supply:
|
||||
description: Analog voltage supply, 2.8V.
|
||||
|
||||
DVDD-supply:
|
||||
description: Digital core voltage supply, 1.5V.
|
||||
|
||||
DOVDD-supply:
|
||||
description: Digital I/O voltage supply, 1.8V.
|
||||
|
||||
powerdown-gpios:
|
||||
maxItems: 1
|
||||
description: Reference to the GPIO connected to the powerdown pin, if any.
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: Reference to the GPIO connected to the reset pin, if any.
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
description: |
|
||||
Video output port.
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
bus-type:
|
||||
enum: [5, 6]
|
||||
|
||||
bus-width:
|
||||
enum: [8, 10]
|
||||
default: 10
|
||||
|
||||
data-shift:
|
||||
enum: [0, 2]
|
||||
default: 0
|
||||
|
||||
hsync-active:
|
||||
enum: [0, 1]
|
||||
default: 1
|
||||
|
||||
vsync-active:
|
||||
enum: [0, 1]
|
||||
default: 1
|
||||
|
||||
pclk-sample:
|
||||
enum: [0, 1]
|
||||
default: 1
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
bus-type:
|
||||
const: 6
|
||||
then:
|
||||
properties:
|
||||
hsync-active: false
|
||||
vsync-active: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
bus-width:
|
||||
const: 10
|
||||
then:
|
||||
properties:
|
||||
data-shift:
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- bus-type
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/media/video-interfaces.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
camera@3c {
|
||||
compatible = "ovti,ov5642";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ov5642>;
|
||||
clocks = <&clk_ext_camera>;
|
||||
DOVDD-supply = <&vgen4_reg>;
|
||||
AVDD-supply = <&vgen3_reg>;
|
||||
DVDD-supply = <&vgen2_reg>;
|
||||
powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
ov5642_to_parallel: endpoint {
|
||||
bus-type = <MEDIA_BUS_TYPE_PARALLEL>;
|
||||
remote-endpoint = <¶llel_from_ov5642>;
|
||||
bus-width = <8>;
|
||||
data-shift = <2>; /* lines 9:2 are used */
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
pclk-sample = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Omnivision OV5693/OV5695 CMOS Sensors
|
||||
|
||||
maintainers:
|
||||
- Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
|
||||
- Tommaso Merciai <tomm.merciai@gmail.com>
|
||||
|
||||
description: |
|
||||
The Omnivision OV5693/OV5695 are high performance, 1/4-inch, 5 megapixel, CMOS
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ required:
|
|||
- vddd-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -44,14 +44,6 @@ properties:
|
|||
description: Sensor reset (XCLR) GPIO
|
||||
maxItems: 1
|
||||
|
||||
flash-leds: true
|
||||
|
||||
lens-focus: true
|
||||
|
||||
orientation: true
|
||||
|
||||
rotation: true
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
|
|
@ -89,7 +81,7 @@ required:
|
|||
- ovdd-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -1,20 +0,0 @@
|
|||
Device-Tree bindings for LIRC TX driver for Nokia N900(RX51)
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "nokia,n900-ir".
|
||||
- pwms: specifies PWM used for IR signal transmission.
|
||||
|
||||
Example node:
|
||||
|
||||
pwm9: dmtimer-pwm@9 {
|
||||
compatible = "ti,omap-dmtimer-pwm";
|
||||
ti,timers = <&timer9>;
|
||||
ti,clock-source = <0x00>; /* timer_sys_ck */
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
|
||||
ir: n900-ir {
|
||||
compatible = "nokia,n900-ir";
|
||||
|
||||
pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
|
||||
};
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/nuvoton,npcm-ece.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nuvoton NPCM Encoding Compression Engine
|
||||
|
||||
maintainers:
|
||||
- Joseph Liu <kwliu@nuvoton.com>
|
||||
- Marvin Lin <kflin@nuvoton.com>
|
||||
|
||||
description: |
|
||||
Video Encoding Compression Engine (ECE) present on Nuvoton NPCM SoCs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- nuvoton,npcm750-ece
|
||||
- nuvoton,npcm845-ece
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- resets
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
|
||||
|
||||
ece: video-codec@f0820000 {
|
||||
compatible = "nuvoton,npcm750-ece";
|
||||
reg = <0xf0820000 0x2000>;
|
||||
resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_ECE>;
|
||||
};
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/nuvoton,npcm-vcd.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nuvoton NPCM Video Capture/Differentiation Engine
|
||||
|
||||
maintainers:
|
||||
- Joseph Liu <kwliu@nuvoton.com>
|
||||
- Marvin Lin <kflin@nuvoton.com>
|
||||
|
||||
description: |
|
||||
Video Capture/Differentiation Engine (VCD) present on Nuvoton NPCM SoCs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- nuvoton,npcm750-vcd
|
||||
- nuvoton,npcm845-vcd
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
nuvoton,sysgcr:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to access GCR (Global Control Register) registers.
|
||||
|
||||
nuvoton,sysgfxi:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to access GFXI (Graphics Core Information) registers.
|
||||
|
||||
nuvoton,ece:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to access ECE (Encoding Compression Engine) registers.
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
description:
|
||||
CMA pool to use for buffers allocation instead of the default CMA pool.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- resets
|
||||
- nuvoton,sysgcr
|
||||
- nuvoton,sysgfxi
|
||||
- nuvoton,ece
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
|
||||
|
||||
vcd: vcd@f0810000 {
|
||||
compatible = "nuvoton,npcm750-vcd";
|
||||
reg = <0xf0810000 0x10000>;
|
||||
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_VCD>;
|
||||
nuvoton,sysgcr = <&gcr>;
|
||||
nuvoton,sysgfxi = <&gfxi>;
|
||||
nuvoton,ece = <&ece>;
|
||||
};
|
||||
|
|
@ -48,6 +48,14 @@ properties:
|
|||
iommus:
|
||||
maxItems: 2
|
||||
|
||||
interconnects:
|
||||
maxItems: 2
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: video-mem
|
||||
- const: cpu-cfg
|
||||
|
||||
operating-points-v2: true
|
||||
opp-table:
|
||||
type: object
|
||||
|
|
|
|||
|
|
@ -68,6 +68,13 @@ properties:
|
|||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: AXI reset line
|
||||
- description: AXI bus interface unit reset line
|
||||
- description: APB reset line
|
||||
- description: APB bus interface unit reset line
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -75,13 +75,20 @@ properties:
|
|||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
samsung,pmu-syscon:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Power Management Unit (PMU) system controller interface, used to
|
||||
power/start the ISP.
|
||||
|
||||
patternProperties:
|
||||
"^pmu@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
deprecated: true
|
||||
description:
|
||||
Node representing the SoC's Power Management Unit (duplicated with the
|
||||
correct PMU node in the SoC).
|
||||
correct PMU node in the SoC). Deprecated, use samsung,pmu-syscon.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
|
|
@ -131,6 +138,7 @@ required:
|
|||
- clock-names
|
||||
- interrupts
|
||||
- ranges
|
||||
- samsung,pmu-syscon
|
||||
- '#size-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
|
@ -179,15 +187,12 @@ examples:
|
|||
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
|
||||
iommu-names = "isp", "drc", "fd", "mcuctl";
|
||||
power-domains = <&pd_isp>;
|
||||
samsung,pmu-syscon = <&pmu_system_controller>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pmu@10020000 {
|
||||
reg = <0x10020000 0x3000>;
|
||||
};
|
||||
|
||||
i2c-isp@12140000 {
|
||||
compatible = "samsung,exynos4212-i2c-isp";
|
||||
reg = <0x12140000 0x100>;
|
||||
|
|
|
|||
|
|
@ -118,7 +118,7 @@ examples:
|
|||
#clock-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x18000000>;
|
||||
ranges = <0x0 0x0 0xba1000>;
|
||||
|
||||
clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
|
||||
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
|
||||
|
|
@ -133,9 +133,9 @@ examples:
|
|||
pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
fimc@11800000 {
|
||||
fimc@0 {
|
||||
compatible = "samsung,exynos4212-fimc";
|
||||
reg = <0x11800000 0x1000>;
|
||||
reg = <0x00000000 0x1000>;
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_FIMC0>,
|
||||
<&clock CLK_SCLK_FIMC0>;
|
||||
|
|
@ -152,9 +152,9 @@ examples:
|
|||
|
||||
/* ... FIMC 1-3 */
|
||||
|
||||
csis@11880000 {
|
||||
csis@80000 {
|
||||
compatible = "samsung,exynos4210-csis";
|
||||
reg = <0x11880000 0x4000>;
|
||||
reg = <0x00080000 0x4000>;
|
||||
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_CSIS0>,
|
||||
<&clock CLK_SCLK_CSIS0>;
|
||||
|
|
@ -187,9 +187,9 @@ examples:
|
|||
|
||||
/* ... CSIS 1 */
|
||||
|
||||
fimc-lite@12390000 {
|
||||
fimc-lite@b90000 {
|
||||
compatible = "samsung,exynos4212-fimc-lite";
|
||||
reg = <0x12390000 0x1000>;
|
||||
reg = <0xb90000 0x1000>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&pd_isp>;
|
||||
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>;
|
||||
|
|
@ -199,9 +199,9 @@ examples:
|
|||
|
||||
/* ... FIMC-LITE 1 */
|
||||
|
||||
fimc-is@12000000 {
|
||||
fimc-is@800000 {
|
||||
compatible = "samsung,exynos4212-fimc-is";
|
||||
reg = <0x12000000 0x260000>;
|
||||
reg = <0x00800000 0x260000>;
|
||||
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
|
||||
|
|
@ -237,18 +237,15 @@ examples:
|
|||
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
|
||||
iommu-names = "isp", "drc", "fd", "mcuctl";
|
||||
power-domains = <&pd_isp>;
|
||||
samsung,pmu-syscon = <&pmu_system_controller>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pmu@10020000 {
|
||||
reg = <0x10020000 0x3000>;
|
||||
};
|
||||
|
||||
i2c-isp@12140000 {
|
||||
i2c-isp@940000 {
|
||||
compatible = "samsung,exynos4212-i2c-isp";
|
||||
reg = <0x12140000 0x100>;
|
||||
reg = <0x00940000 0x100>;
|
||||
clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
|
||||
clock-names = "i2c_isp";
|
||||
pinctrl-0 = <&fimc_is_i2c1>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,100 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/media/ti,j721e-csi2rx-shim.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI J721E CSI2RX Shim
|
||||
|
||||
description: |
|
||||
The TI J721E CSI2RX Shim is a wrapper around Cadence CSI2RX bridge that
|
||||
enables sending captured frames to memory over PSI-L DMA. In the J721E
|
||||
Technical Reference Manual (SPRUIL1B) it is referred to as "SHIM" under the
|
||||
CSI_RX_IF section.
|
||||
|
||||
maintainers:
|
||||
- Jai Luthra <j-luthra@ti.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,j721e-csi2rx-shim
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: rx0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
"#address-cells": true
|
||||
|
||||
"#size-cells": true
|
||||
|
||||
patternProperties:
|
||||
"^csi-bridge@":
|
||||
type: object
|
||||
description: CSI2 bridge node.
|
||||
$ref: cdns,csi2rx.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- dmas
|
||||
- dma-names
|
||||
- power-domains
|
||||
- ranges
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
ti_csi2rx0: ticsi2rx@4500000 {
|
||||
compatible = "ti,j721e-csi2rx-shim";
|
||||
dmas = <&main_udmap 0x4940>;
|
||||
dma-names = "rx0";
|
||||
reg = <0x4500000 0x1000>;
|
||||
power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
cdns_csi2rx: csi-bridge@4504000 {
|
||||
compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
|
||||
reg = <0x4504000 0x1000>;
|
||||
clocks = <&k3_clks 26 2>, <&k3_clks 26 0>, <&k3_clks 26 2>,
|
||||
<&k3_clks 26 2>, <&k3_clks 26 3>, <&k3_clks 26 3>;
|
||||
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
|
||||
"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
|
||||
phys = <&dphy0>;
|
||||
phy-names = "dphy";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi2_0: port@0 {
|
||||
|
||||
reg = <0>;
|
||||
|
||||
csi2rx0_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam0>;
|
||||
bus-type = <4>; /* CSI2 DPHY. */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -160,6 +160,7 @@ properties:
|
|||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
uniqueItems: true
|
||||
items:
|
||||
# Assume up to 9 physical lane indices
|
||||
maximum: 8
|
||||
|
|
|
|||
|
|
@ -15,12 +15,19 @@ allOf:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx23-pwm
|
||||
oneOf:
|
||||
- const: fsl,imx23-pwm
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx28-pwm
|
||||
- const: fsl,imx23-pwm
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
"#pwm-cells":
|
||||
const: 3
|
||||
|
||||
|
|
@ -31,6 +38,7 @@ properties:
|
|||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- fsl,pwm-number
|
||||
|
||||
additionalProperties: false
|
||||
|
|
@ -40,6 +48,7 @@ examples:
|
|||
pwm@80064000 {
|
||||
compatible = "fsl,imx23-pwm";
|
||||
reg = <0x80064000 0x2000>;
|
||||
clocks = <&clks 30>;
|
||||
#pwm-cells = <3>;
|
||||
fsl,pwm-number = <8>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ properties:
|
|||
- mediatek,mt8188-scp
|
||||
- mediatek,mt8192-scp
|
||||
- mediatek,mt8195-scp
|
||||
- mediatek,mt8195-scp-dual
|
||||
|
||||
reg:
|
||||
description:
|
||||
|
|
@ -31,10 +32,7 @@ properties:
|
|||
|
||||
reg-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: sram
|
||||
- const: cfg
|
||||
- const: l1tcm
|
||||
maxItems: 3
|
||||
|
||||
clocks:
|
||||
description:
|
||||
|
|
@ -58,6 +56,93 @@ properties:
|
|||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
cros-ec-rpmsg:
|
||||
$ref: /schemas/mfd/google,cros-ec.yaml
|
||||
description:
|
||||
This subnode represents the rpmsg device. The properties
|
||||
of this node are defined by the individual bindings for
|
||||
the rpmsg devices.
|
||||
|
||||
required:
|
||||
- mediatek,rpmsg-name
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
ranges:
|
||||
description:
|
||||
Standard ranges definition providing address translations for
|
||||
local SCP SRAM address spaces to bus addresses.
|
||||
|
||||
patternProperties:
|
||||
"^scp@[a-f0-9]+$":
|
||||
type: object
|
||||
description:
|
||||
The MediaTek SCP integrated to SoC might be a multi-core version.
|
||||
The other cores are represented as child nodes of the boot core.
|
||||
There are some integration differences for the IP like the usage of
|
||||
address translator for translating SoC bus addresses into address space
|
||||
for the processor.
|
||||
|
||||
Each SCP core has own cache memory. The SRAM and L1TCM are shared by
|
||||
cores. The power of cache, SRAM and L1TCM power should be enabled
|
||||
before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
|
||||
on differnt SoCs.
|
||||
|
||||
The SCP cores do not use an MMU, but has a set of registers to
|
||||
control the translations between 32-bit CPU addresses into system bus
|
||||
addresses. Cache and memory access settings are provided through a
|
||||
Memory Protection Unit (MPU), programmable only from the SCP.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,scp-core
|
||||
|
||||
reg:
|
||||
description: The base address and size of SRAM.
|
||||
maxItems: 1
|
||||
|
||||
reg-names:
|
||||
const: sram
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
firmware-name:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description:
|
||||
If present, name (or relative path) of the file within the
|
||||
firmware search path containing the firmware image used when
|
||||
initializing sub cores of multi-core SCP.
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
|
||||
cros-ec-rpmsg:
|
||||
$ref: /schemas/mfd/google,cros-ec.yaml
|
||||
description:
|
||||
This subnode represents the rpmsg device. The properties
|
||||
of this node are defined by the individual bindings for
|
||||
the rpmsg devices.
|
||||
|
||||
required:
|
||||
- mediatek,rpmsg-name
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
@ -87,23 +172,39 @@ allOf:
|
|||
reg:
|
||||
maxItems: 2
|
||||
reg-names:
|
||||
items:
|
||||
- const: sram
|
||||
- const: cfg
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt8192-scp
|
||||
- mediatek,mt8195-scp
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 3
|
||||
reg-names:
|
||||
items:
|
||||
- const: sram
|
||||
- const: cfg
|
||||
- const: l1tcm
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt8195-scp-dual
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 2
|
||||
reg-names:
|
||||
items:
|
||||
- const: cfg
|
||||
- const: l1tcm
|
||||
|
||||
additionalProperties:
|
||||
type: object
|
||||
description:
|
||||
Subnodes of the SCP represent rpmsg devices. The names of the devices
|
||||
are not important. The properties of these nodes are defined by the
|
||||
individual bindings for the rpmsg devices.
|
||||
properties:
|
||||
mediatek,rpmsg-name:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description:
|
||||
Contains the name for the rpmsg device. Used to match
|
||||
the subnode to rpmsg device announced by SCP.
|
||||
|
||||
required:
|
||||
- mediatek,rpmsg-name
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
@ -118,7 +219,42 @@ examples:
|
|||
clocks = <&infracfg CLK_INFRA_SCPSYS>;
|
||||
clock-names = "main";
|
||||
|
||||
cros_ec {
|
||||
cros-ec-rpmsg {
|
||||
compatible = "google,cros-ec-rpmsg";
|
||||
mediatek,rpmsg-name = "cros-ec-rpmsg";
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
scp@10500000 {
|
||||
compatible = "mediatek,mt8195-scp-dual";
|
||||
reg = <0x10720000 0xe0000>,
|
||||
<0x10700000 0x8000>;
|
||||
reg-names = "cfg", "l1tcm";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x10500000 0x100000>;
|
||||
|
||||
scp@0 {
|
||||
compatible = "mediatek,scp-core";
|
||||
reg = <0x0 0xa0000>;
|
||||
reg-names = "sram";
|
||||
|
||||
cros-ec-rpmsg {
|
||||
compatible = "google,cros-ec-rpmsg";
|
||||
mediatek,rpmsg-name = "cros-ec-rpmsg";
|
||||
};
|
||||
};
|
||||
|
||||
scp@a0000 {
|
||||
compatible = "mediatek,scp-core";
|
||||
reg = <0xa0000 0x20000>;
|
||||
reg-names = "sram";
|
||||
|
||||
cros-ec-rpmsg {
|
||||
compatible = "google,cros-ec-rpmsg";
|
||||
mediatek,rpmsg-name = "cros-ec-rpmsg";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -66,7 +66,9 @@ allOf:
|
|||
- qcom,msm8953-adsp-pil
|
||||
- qcom,msm8974-adsp-pil
|
||||
- qcom,msm8996-adsp-pil
|
||||
- qcom,msm8996-slpi-pil
|
||||
- qcom,msm8998-adsp-pas
|
||||
- qcom,msm8998-slpi-pas
|
||||
- qcom,sdm845-adsp-pas
|
||||
- qcom,sdm845-cdsp-pas
|
||||
- qcom,sdm845-slpi-pas
|
||||
|
|
@ -79,24 +81,6 @@ allOf:
|
|||
items:
|
||||
- const: xo
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-slpi-pil
|
||||
- qcom,msm8998-slpi-pas
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: XO clock
|
||||
- description: AGGRE2 clock
|
||||
clock-names:
|
||||
items:
|
||||
- const: xo
|
||||
- const: aggre2
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -220,7 +220,6 @@ allOf:
|
|||
- description: GCC MSS GPLL0 clock
|
||||
- description: GCC MSS SNOC_AXI clock
|
||||
- description: GCC MSS MNOC_AXI clock
|
||||
- description: RPM PNOC clock
|
||||
- description: RPM QDSS clock
|
||||
clock-names:
|
||||
items:
|
||||
|
|
@ -231,7 +230,6 @@ allOf:
|
|||
- const: gpll0_mss
|
||||
- const: snoc_axi
|
||||
- const: mnoc_axi
|
||||
- const: pnoc
|
||||
- const: qdss
|
||||
glink-edge: false
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@ description:
|
|||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-adsp-pas
|
||||
- qcom,sc7180-mpss-pas
|
||||
- qcom,sc7280-mpss-pas
|
||||
|
||||
|
|
@ -30,26 +31,6 @@ properties:
|
|||
items:
|
||||
- const: xo
|
||||
|
||||
interrupts:
|
||||
minItems: 6
|
||||
|
||||
interrupt-names:
|
||||
minItems: 6
|
||||
|
||||
power-domains:
|
||||
minItems: 2
|
||||
items:
|
||||
- description: CX power domain
|
||||
- description: MX power domain
|
||||
- description: MSS power domain
|
||||
|
||||
power-domain-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: cx
|
||||
- const: mx
|
||||
- const: mss
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
description: Reference to the reserved-memory for the Hexagon core
|
||||
|
|
@ -71,6 +52,40 @@ required:
|
|||
|
||||
allOf:
|
||||
- $ref: /schemas/remoteproc/qcom,pas-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-adsp-pas
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 5
|
||||
interrupt-names:
|
||||
maxItems: 5
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 6
|
||||
interrupt-names:
|
||||
minItems: 6
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-adsp-pas
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
items:
|
||||
- description: LCX power domain
|
||||
- description: LMX power domain
|
||||
power-domain-names:
|
||||
items:
|
||||
- const: lcx
|
||||
- const: lmx
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -79,15 +94,31 @@ allOf:
|
|||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
minItems: 3
|
||||
items:
|
||||
- description: CX power domain
|
||||
- description: MX power domain
|
||||
- description: MSS power domain
|
||||
power-domain-names:
|
||||
minItems: 3
|
||||
else:
|
||||
items:
|
||||
- const: cx
|
||||
- const: mx
|
||||
- const: mss
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7280-mpss-pas
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: CX power domain
|
||||
- description: MX power domain
|
||||
power-domain-names:
|
||||
maxItems: 2
|
||||
items:
|
||||
- const: cx
|
||||
- const: mx
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,145 @@
|
|||
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/remoteproc/qcom,sm6375-pas.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm SM6375 Peripheral Authentication Service
|
||||
|
||||
maintainers:
|
||||
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
|
||||
description:
|
||||
Qualcomm SM6375 SoC Peripheral Authentication Service loads and boots
|
||||
firmware on the Qualcomm DSP Hexagon cores.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6375-adsp-pas
|
||||
- qcom,sm6375-cdsp-pas
|
||||
- qcom,sm6375-mpss-pas
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XO clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xo
|
||||
|
||||
memory-region:
|
||||
maxItems: 1
|
||||
description: Reference to the reserved-memory for the Hexagon core
|
||||
|
||||
firmware-name:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: Firmware name for the Hexagon core
|
||||
|
||||
smd-edge: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/remoteproc/qcom,pas-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6375-adsp-pas
|
||||
- qcom,sm6375-cdsp-pas
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 5
|
||||
interrupt-names:
|
||||
maxItems: 5
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 6
|
||||
interrupt-names:
|
||||
minItems: 6
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6375-adsp-pas
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
items:
|
||||
- description: LCX power domain
|
||||
- description: LMX power domain
|
||||
power-domain-names:
|
||||
items:
|
||||
- const: lcx
|
||||
- const: lmx
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6375-cdsp-pas
|
||||
- qcom,sm6375-mpss-pas
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
items:
|
||||
- description: CX power domain
|
||||
power-domain-names:
|
||||
items:
|
||||
- const: cx
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/mailbox/qcom-ipcc.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
|
||||
remoteproc_adsp: remoteproc@a400000 {
|
||||
compatible = "qcom,sm6375-adsp-pas";
|
||||
reg = <0x0a400000 0x100>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmpd SM6375_VDD_LPI_CX>,
|
||||
<&rpmpd SM6375_VDD_LPI_MX>;
|
||||
power-domain-names = "lcx", "lmx";
|
||||
|
||||
memory-region = <&pil_adsp_mem>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
/* ... */
|
||||
};
|
||||
};
|
||||
|
|
@ -66,6 +66,17 @@ properties:
|
|||
Should contain the name of the default firmware image
|
||||
file located on the firmware search path.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description:
|
||||
Interrupt specifiers enable the virtio/rpmsg communication between MPU
|
||||
and the PRU/RTU cores. For the values of the interrupt cells please refer
|
||||
to interrupt-controller/ti,pruss-intc.yaml schema.
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: vring
|
||||
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -171,6 +182,9 @@ examples:
|
|||
<0x22400 0x100>;
|
||||
reg-names = "iram", "control", "debug";
|
||||
firmware-name = "am65x-pru0_0-fw";
|
||||
interrupt-parent = <&icssg0_intc>;
|
||||
interrupts = <16 2 2>;
|
||||
interrupt-names = "vring";
|
||||
};
|
||||
|
||||
rtu0_0: rtu@4000 {
|
||||
|
|
@ -180,6 +194,9 @@ examples:
|
|||
<0x23400 0x100>;
|
||||
reg-names = "iram", "control", "debug";
|
||||
firmware-name = "am65x-rtu0_0-fw";
|
||||
interrupt-parent = <&icssg0_intc>;
|
||||
interrupts = <20 4 4>;
|
||||
interrupt-names = "vring";
|
||||
};
|
||||
|
||||
tx_pru0_0: txpru@a000 {
|
||||
|
|
@ -198,6 +215,9 @@ examples:
|
|||
<0x24400 0x100>;
|
||||
reg-names = "iram", "control", "debug";
|
||||
firmware-name = "am65x-pru0_1-fw";
|
||||
interrupt-parent = <&icssg0_intc>;
|
||||
interrupts = <18 3 3>;
|
||||
interrupt-names = "vring";
|
||||
};
|
||||
|
||||
rtu0_1: rtu@6000 {
|
||||
|
|
@ -207,6 +227,9 @@ examples:
|
|||
<0x23c00 0x100>;
|
||||
reg-names = "iram", "control", "debug";
|
||||
firmware-name = "am65x-rtu0_1-fw";
|
||||
interrupt-parent = <&icssg0_intc>;
|
||||
interrupts = <22 5 5>;
|
||||
interrupt-names = "vring";
|
||||
};
|
||||
|
||||
tx_pru0_1: txpru@c000 {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,39 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/nuvoton/nuvoton,gfxi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Graphics Core Information block in Nuvoton SoCs
|
||||
|
||||
maintainers:
|
||||
- Joseph Liu <kwliu@nuvoton.com>
|
||||
- Marvin Lin <kflin@nuvoton.com>
|
||||
|
||||
description:
|
||||
The Graphics Core Information (GFXI) are a block of registers in Nuvoton SoCs
|
||||
that analyzes Graphics core behavior and provides information in registers.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- nuvoton,npcm750-gfxi
|
||||
- nuvoton,npcm845-gfxi
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
gfxi: gfxi@e000 {
|
||||
compatible = "nuvoton,npcm750-gfxi", "syscon";
|
||||
reg = <0xe000 0x100>;
|
||||
};
|
||||
|
|
@ -309,8 +309,6 @@ properties:
|
|||
- nuvoton,w83773g
|
||||
# OKI ML86V7667 video decoder
|
||||
- oki,ml86v7667
|
||||
# OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus
|
||||
- ovti,ov5642
|
||||
# 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
|
||||
- plx,pex8648
|
||||
# Pulsedlight LIDAR range-finding sensor
|
||||
|
|
|
|||
|
|
@ -15,9 +15,15 @@ allOf:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-gxbb-wdt
|
||||
- amlogic,t7-wdt
|
||||
oneOf:
|
||||
- enum:
|
||||
- amlogic,meson-gxbb-wdt
|
||||
- amlogic,t7-wdt
|
||||
- items:
|
||||
- enum:
|
||||
- amlogic,c3-wdt
|
||||
- amlogic,s4-wdt
|
||||
- const: amlogic,t7-wdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -47,7 +47,15 @@ Optional properties for AST2500-compatible watchdogs:
|
|||
is configured as push-pull, then set the pulse
|
||||
polarity to active-high. The default is active-low.
|
||||
|
||||
Example:
|
||||
Optional properties for AST2500- and AST2600-compatible watchdogs:
|
||||
- aspeed,reset-mask: A bitmask indicating which peripherals will be reset if
|
||||
the watchdog timer expires. On AST2500 this should be a
|
||||
single word defined using the AST2500_WDT_RESET_* macros;
|
||||
on AST2600 this should be a two-word array with the first
|
||||
word defined using the AST2600_WDT_RESET1_* macros and the
|
||||
second word defined using the AST2600_WDT_RESET2_* macros.
|
||||
|
||||
Examples:
|
||||
|
||||
wdt1: watchdog@1e785000 {
|
||||
compatible = "aspeed,ast2400-wdt";
|
||||
|
|
@ -55,3 +63,11 @@ Example:
|
|||
aspeed,reset-type = "system";
|
||||
aspeed,external-signal;
|
||||
};
|
||||
|
||||
#include <dt-bindings/watchdog/aspeed-wdt.h>
|
||||
wdt2: watchdog@1e785040 {
|
||||
compatible = "aspeed,ast2600-wdt";
|
||||
reg = <0x1e785040 0x40>;
|
||||
aspeed,reset-mask = <AST2600_WDT_RESET1_DEFAULT
|
||||
(AST2600_WDT_RESET2_DEFAULT & ~AST2600_WDT_RESET2_LPC)>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -30,6 +30,11 @@ properties:
|
|||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
fsl,ext-reset-output:
|
||||
description:
|
||||
When set, wdog can generate external reset from the wdog_any pin.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
|
|
|
|||
|
|
@ -21,6 +21,8 @@ properties:
|
|||
- qcom,apss-wdt-ipq5018
|
||||
- qcom,apss-wdt-ipq5332
|
||||
- qcom,apss-wdt-ipq9574
|
||||
- qcom,apss-wdt-msm8226
|
||||
- qcom,apss-wdt-msm8974
|
||||
- qcom,apss-wdt-msm8994
|
||||
- qcom,apss-wdt-qcm2290
|
||||
- qcom,apss-wdt-qcs404
|
||||
|
|
|
|||
|
|
@ -1,8 +1,14 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
.. _media_writing_camera_sensor_drivers:
|
||||
|
||||
Writing camera sensor drivers
|
||||
=============================
|
||||
|
||||
This document covers the in-kernel APIs only. For the best practices on
|
||||
userspace API implementation in camera sensor drivers, please see
|
||||
:ref:`media_using_camera_sensor_drivers`.
|
||||
|
||||
CSI-2 and parallel (BT.601 and BT.656) busses
|
||||
---------------------------------------------
|
||||
|
||||
|
|
@ -13,7 +19,7 @@ Handling clocks
|
|||
|
||||
Camera sensors have an internal clock tree including a PLL and a number of
|
||||
divisors. The clock tree is generally configured by the driver based on a few
|
||||
input parameters that are specific to the hardware:: the external clock frequency
|
||||
input parameters that are specific to the hardware: the external clock frequency
|
||||
and the link frequency. The two parameters generally are obtained from system
|
||||
firmware. **No other frequencies should be used in any circumstances.**
|
||||
|
||||
|
|
@ -32,110 +38,61 @@ can rely on this frequency being used.
|
|||
Devicetree
|
||||
~~~~~~~~~~
|
||||
|
||||
The currently preferred way to achieve this is using ``assigned-clocks``,
|
||||
``assigned-clock-parents`` and ``assigned-clock-rates`` properties. See
|
||||
``Documentation/devicetree/bindings/clock/clock-bindings.txt`` for more
|
||||
information. The driver then gets the frequency using ``clk_get_rate()``.
|
||||
The preferred way to achieve this is using ``assigned-clocks``,
|
||||
``assigned-clock-parents`` and ``assigned-clock-rates`` properties. See the
|
||||
`clock device tree bindings
|
||||
<https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml>`_
|
||||
for more information. The driver then gets the frequency using
|
||||
``clk_get_rate()``.
|
||||
|
||||
This approach has the drawback that there's no guarantee that the frequency
|
||||
hasn't been modified directly or indirectly by another driver, or supported by
|
||||
the board's clock tree to begin with. Changes to the Common Clock Framework API
|
||||
are required to ensure reliability.
|
||||
|
||||
Frame size
|
||||
----------
|
||||
|
||||
There are two distinct ways to configure the frame size produced by camera
|
||||
sensors.
|
||||
|
||||
Freely configurable camera sensor drivers
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Freely configurable camera sensor drivers expose the device's internal
|
||||
processing pipeline as one or more sub-devices with different cropping and
|
||||
scaling configurations. The output size of the device is the result of a series
|
||||
of cropping and scaling operations from the device's pixel array's size.
|
||||
|
||||
An example of such a driver is the CCS driver (see ``drivers/media/i2c/ccs``).
|
||||
|
||||
Register list based drivers
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Register list based drivers generally, instead of able to configure the device
|
||||
they control based on user requests, are limited to a number of preset
|
||||
configurations that combine a number of different parameters that on hardware
|
||||
level are independent. How a driver picks such configuration is based on the
|
||||
format set on a source pad at the end of the device's internal pipeline.
|
||||
|
||||
Most sensor drivers are implemented this way, see e.g.
|
||||
``drivers/media/i2c/imx319.c`` for an example.
|
||||
|
||||
Frame interval configuration
|
||||
----------------------------
|
||||
|
||||
There are two different methods for obtaining possibilities for different frame
|
||||
intervals as well as configuring the frame interval. Which one to implement
|
||||
depends on the type of the device.
|
||||
|
||||
Raw camera sensors
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Instead of a high level parameter such as frame interval, the frame interval is
|
||||
a result of the configuration of a number of camera sensor implementation
|
||||
specific parameters. Luckily, these parameters tend to be the same for more or
|
||||
less all modern raw camera sensors.
|
||||
|
||||
The frame interval is calculated using the following equation::
|
||||
|
||||
frame interval = (analogue crop width + horizontal blanking) *
|
||||
(analogue crop height + vertical blanking) / pixel rate
|
||||
|
||||
The formula is bus independent and is applicable for raw timing parameters on
|
||||
large variety of devices beyond camera sensors. Devices that have no analogue
|
||||
crop, use the full source image size, i.e. pixel array size.
|
||||
|
||||
Horizontal and vertical blanking are specified by ``V4L2_CID_HBLANK`` and
|
||||
``V4L2_CID_VBLANK``, respectively. The unit of the ``V4L2_CID_HBLANK`` control
|
||||
is pixels and the unit of the ``V4L2_CID_VBLANK`` is lines. The pixel rate in
|
||||
the sensor's **pixel array** is specified by ``V4L2_CID_PIXEL_RATE`` in the same
|
||||
sub-device. The unit of that control is pixels per second.
|
||||
|
||||
Register list based drivers need to implement read-only sub-device nodes for the
|
||||
purpose. Devices that are not register list based need these to configure the
|
||||
device's internal processing pipeline.
|
||||
|
||||
The first entity in the linear pipeline is the pixel array. The pixel array may
|
||||
be followed by other entities that are there to allow configuring binning,
|
||||
skipping, scaling or digital crop :ref:`v4l2-subdev-selections`.
|
||||
|
||||
USB cameras etc. devices
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
USB video class hardware, as well as many cameras offering a similar higher
|
||||
level interface natively, generally use the concept of frame interval (or frame
|
||||
rate) on device level in firmware or hardware. This means lower level controls
|
||||
implemented by raw cameras may not be used on uAPI (or even kAPI) to control the
|
||||
frame interval on these devices.
|
||||
|
||||
Power management
|
||||
----------------
|
||||
|
||||
Always use runtime PM to manage the power states of your device. Camera sensor
|
||||
drivers are in no way special in this respect: they are responsible for
|
||||
controlling the power state of the device they otherwise control as well. In
|
||||
general, the device must be powered on at least when its registers are being
|
||||
accessed and when it is streaming.
|
||||
Camera sensors are used in conjunction with other devices to form a camera
|
||||
pipeline. They must obey the rules listed herein to ensure coherent power
|
||||
management over the pipeline.
|
||||
|
||||
Existing camera sensor drivers may rely on the old
|
||||
struct v4l2_subdev_core_ops->s_power() callback for bridge or ISP drivers to
|
||||
manage their power state. This is however **deprecated**. If you feel you need
|
||||
to begin calling an s_power from an ISP or a bridge driver, instead please add
|
||||
runtime PM support to the sensor driver you are using. Likewise, new drivers
|
||||
should not use s_power.
|
||||
Camera sensor drivers are responsible for controlling the power state of the
|
||||
device they otherwise control as well. They shall use runtime PM to manage
|
||||
power states. Runtime PM shall be enabled at probe time and disabled at remove
|
||||
time. Drivers should enable runtime PM autosuspend.
|
||||
|
||||
Please see examples in e.g. ``drivers/media/i2c/ov8856.c`` and
|
||||
``drivers/media/i2c/ccs/ccs-core.c``. The two drivers work in both ACPI
|
||||
and DT based systems.
|
||||
The runtime PM handlers shall handle clocks, regulators, GPIOs, and other
|
||||
system resources required to power the sensor up and down. For drivers that
|
||||
don't use any of those resources (such as drivers that support ACPI systems
|
||||
only), the runtime PM handlers may be left unimplemented.
|
||||
|
||||
In general, the device shall be powered on at least when its registers are
|
||||
being accessed and when it is streaming. Drivers should use
|
||||
``pm_runtime_resume_and_get()`` when starting streaming and
|
||||
``pm_runtime_put()`` or ``pm_runtime_put_autosuspend()`` when stopping
|
||||
streaming. They may power the device up at probe time (for example to read
|
||||
identification registers), but should not keep it powered unconditionally after
|
||||
probe.
|
||||
|
||||
At system suspend time, the whole camera pipeline must stop streaming, and
|
||||
restart when the system is resumed. This requires coordination between the
|
||||
camera sensor and the rest of the camera pipeline. Bridge drivers are
|
||||
responsible for this coordination, and instruct camera sensors to stop and
|
||||
restart streaming by calling the appropriate subdev operations
|
||||
(``.s_stream()``, ``.enable_streams()`` or ``.disable_streams()``). Camera
|
||||
sensor drivers shall therefore **not** keep track of the streaming state to
|
||||
stop streaming in the PM suspend handler and restart it in the resume handler.
|
||||
Drivers should in general not implement the system PM handlers.
|
||||
|
||||
Camera sensor drivers shall **not** implement the subdev ``.s_power()``
|
||||
operation, as it is deprecated. While this operation is implemented in some
|
||||
existing drivers as they predate the deprecation, new drivers shall use runtime
|
||||
PM instead. If you feel you need to begin calling ``.s_power()`` from an ISP or
|
||||
a bridge driver, instead add runtime PM support to the sensor driver you are
|
||||
using and drop its ``.s_power()`` handler.
|
||||
|
||||
Please also see :ref:`examples <media-camera-sensor-examples>`.
|
||||
|
||||
Control framework
|
||||
~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -155,21 +112,36 @@ access the device.
|
|||
Rotation, orientation and flipping
|
||||
----------------------------------
|
||||
|
||||
Some systems have the camera sensor mounted upside down compared to its natural
|
||||
mounting rotation. In such cases, drivers shall expose the information to
|
||||
userspace with the :ref:`V4L2_CID_CAMERA_SENSOR_ROTATION
|
||||
<v4l2-camera-sensor-rotation>` control.
|
||||
|
||||
Sensor drivers shall also report the sensor's mounting orientation with the
|
||||
:ref:`V4L2_CID_CAMERA_SENSOR_ORIENTATION <v4l2-camera-sensor-orientation>`.
|
||||
|
||||
Use ``v4l2_fwnode_device_parse()`` to obtain rotation and orientation
|
||||
information from system firmware and ``v4l2_ctrl_new_fwnode_properties()`` to
|
||||
register the appropriate controls.
|
||||
|
||||
Sensor drivers that have any vertical or horizontal flips embedded in the
|
||||
register programming sequences shall initialize the V4L2_CID_HFLIP and
|
||||
V4L2_CID_VFLIP controls with the values programmed by the register sequences.
|
||||
The default values of these controls shall be 0 (disabled). Especially these
|
||||
controls shall not be inverted, independently of the sensor's mounting
|
||||
rotation.
|
||||
.. _media-camera-sensor-examples:
|
||||
|
||||
Example drivers
|
||||
---------------
|
||||
|
||||
Features implemented by sensor drivers vary, and depending on the set of
|
||||
supported features and other qualities, particular sensor drivers better serve
|
||||
the purpose of an example. The following drivers are known to be good examples:
|
||||
|
||||
.. flat-table:: Example sensor drivers
|
||||
:header-rows: 0
|
||||
:widths: 1 1 1 2
|
||||
|
||||
* - Driver name
|
||||
- File(s)
|
||||
- Driver type
|
||||
- Example topic
|
||||
* - CCS
|
||||
- ``drivers/media/i2c/ccs/``
|
||||
- Freely configurable
|
||||
- Power management (ACPI and DT), UAPI
|
||||
* - imx219
|
||||
- ``drivers/media/i2c/imx219.c``
|
||||
- Register list based
|
||||
- Power management (DT), UAPI, mode selection
|
||||
* - imx319
|
||||
- ``drivers/media/i2c/imx319.c``
|
||||
- Register list based
|
||||
- Power management (ACPI and DT)
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@ that purpose, selection target ``V4L2_SEL_TGT_COMPOSE`` is supported on the
|
|||
sink pad (0).
|
||||
|
||||
Additionally, if a device has no scaler or digital crop functionality, the
|
||||
source pad (1) expses another digital crop selection rectangle that can only
|
||||
source pad (1) exposes another digital crop selection rectangle that can only
|
||||
crop at the end of the lines and frames.
|
||||
|
||||
Scaler
|
||||
|
|
@ -78,6 +78,14 @@ For SMIA (non-++) compliant devices the static data file name is
|
|||
vvvv or vv denotes MIPI and SMIA manufacturer IDs respectively, mmmm model ID
|
||||
and rrrr or rr revision number.
|
||||
|
||||
CCS tools
|
||||
~~~~~~~~~
|
||||
|
||||
`CCS tools <https://github.com/MIPI-Alliance/ccs-tools/>`_ is a set of
|
||||
tools for working with CCS static data files. CCS tools includes a
|
||||
definition of the human-readable CCS static data YAML format and includes a
|
||||
program to convert it to a binary.
|
||||
|
||||
Register definition generator
|
||||
-----------------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,6 @@ Video4Linux devices
|
|||
v4l2-subdev
|
||||
v4l2-event
|
||||
v4l2-controls
|
||||
v4l2-videobuf
|
||||
v4l2-videobuf2
|
||||
v4l2-dv-timings
|
||||
v4l2-flash-led-class
|
||||
|
|
|
|||
|
|
@ -157,14 +157,6 @@ changing the e.g. exposure of the webcam.
|
|||
Of course, you can always do all the locking yourself by leaving both lock
|
||||
pointers at ``NULL``.
|
||||
|
||||
If you use the old :ref:`videobuf framework <vb_framework>` then you must
|
||||
pass the :c:type:`video_device`->lock to the videobuf queue initialize
|
||||
function: if videobuf has to wait for a frame to arrive, then it will
|
||||
temporarily unlock the lock and relock it afterwards. If your driver also
|
||||
waits in the code, then you should do the same to allow other
|
||||
processes to access the device node while the first process is waiting for
|
||||
something.
|
||||
|
||||
In the case of :ref:`videobuf2 <vb2_framework>` you will need to implement the
|
||||
``wait_prepare()`` and ``wait_finish()`` callbacks to unlock/lock if applicable.
|
||||
If you use the ``queue->lock`` pointer, then you can use the helper functions
|
||||
|
|
|
|||
|
|
@ -1,403 +0,0 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
.. _vb_framework:
|
||||
|
||||
Videobuf Framework
|
||||
==================
|
||||
|
||||
Author: Jonathan Corbet <corbet@lwn.net>
|
||||
|
||||
Current as of 2.6.33
|
||||
|
||||
.. note::
|
||||
|
||||
The videobuf framework was deprecated in favor of videobuf2. Shouldn't
|
||||
be used on new drivers.
|
||||
|
||||
Introduction
|
||||
------------
|
||||
|
||||
The videobuf layer functions as a sort of glue layer between a V4L2 driver
|
||||
and user space. It handles the allocation and management of buffers for
|
||||
the storage of video frames. There is a set of functions which can be used
|
||||
to implement many of the standard POSIX I/O system calls, including read(),
|
||||
poll(), and, happily, mmap(). Another set of functions can be used to
|
||||
implement the bulk of the V4L2 ioctl() calls related to streaming I/O,
|
||||
including buffer allocation, queueing and dequeueing, and streaming
|
||||
control. Using videobuf imposes a few design decisions on the driver
|
||||
author, but the payback comes in the form of reduced code in the driver and
|
||||
a consistent implementation of the V4L2 user-space API.
|
||||
|
||||
Buffer types
|
||||
------------
|
||||
|
||||
Not all video devices use the same kind of buffers. In fact, there are (at
|
||||
least) three common variations:
|
||||
|
||||
- Buffers which are scattered in both the physical and (kernel) virtual
|
||||
address spaces. (Almost) all user-space buffers are like this, but it
|
||||
makes great sense to allocate kernel-space buffers this way as well when
|
||||
it is possible. Unfortunately, it is not always possible; working with
|
||||
this kind of buffer normally requires hardware which can do
|
||||
scatter/gather DMA operations.
|
||||
|
||||
- Buffers which are physically scattered, but which are virtually
|
||||
contiguous; buffers allocated with vmalloc(), in other words. These
|
||||
buffers are just as hard to use for DMA operations, but they can be
|
||||
useful in situations where DMA is not available but virtually-contiguous
|
||||
buffers are convenient.
|
||||
|
||||
- Buffers which are physically contiguous. Allocation of this kind of
|
||||
buffer can be unreliable on fragmented systems, but simpler DMA
|
||||
controllers cannot deal with anything else.
|
||||
|
||||
Videobuf can work with all three types of buffers, but the driver author
|
||||
must pick one at the outset and design the driver around that decision.
|
||||
|
||||
[It's worth noting that there's a fourth kind of buffer: "overlay" buffers
|
||||
which are located within the system's video memory. The overlay
|
||||
functionality is considered to be deprecated for most use, but it still
|
||||
shows up occasionally in system-on-chip drivers where the performance
|
||||
benefits merit the use of this technique. Overlay buffers can be handled
|
||||
as a form of scattered buffer, but there are very few implementations in
|
||||
the kernel and a description of this technique is currently beyond the
|
||||
scope of this document.]
|
||||
|
||||
Data structures, callbacks, and initialization
|
||||
----------------------------------------------
|
||||
|
||||
Depending on which type of buffers are being used, the driver should
|
||||
include one of the following files:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
<media/videobuf-dma-sg.h> /* Physically scattered */
|
||||
<media/videobuf-vmalloc.h> /* vmalloc() buffers */
|
||||
<media/videobuf-dma-contig.h> /* Physically contiguous */
|
||||
|
||||
The driver's data structure describing a V4L2 device should include a
|
||||
struct videobuf_queue instance for the management of the buffer queue,
|
||||
along with a list_head for the queue of available buffers. There will also
|
||||
need to be an interrupt-safe spinlock which is used to protect (at least)
|
||||
the queue.
|
||||
|
||||
The next step is to write four simple callbacks to help videobuf deal with
|
||||
the management of buffers:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
struct videobuf_queue_ops {
|
||||
int (*buf_setup)(struct videobuf_queue *q,
|
||||
unsigned int *count, unsigned int *size);
|
||||
int (*buf_prepare)(struct videobuf_queue *q,
|
||||
struct videobuf_buffer *vb,
|
||||
enum v4l2_field field);
|
||||
void (*buf_queue)(struct videobuf_queue *q,
|
||||
struct videobuf_buffer *vb);
|
||||
void (*buf_release)(struct videobuf_queue *q,
|
||||
struct videobuf_buffer *vb);
|
||||
};
|
||||
|
||||
buf_setup() is called early in the I/O process, when streaming is being
|
||||
initiated; its purpose is to tell videobuf about the I/O stream. The count
|
||||
parameter will be a suggested number of buffers to use; the driver should
|
||||
check it for rationality and adjust it if need be. As a practical rule, a
|
||||
minimum of two buffers are needed for proper streaming, and there is
|
||||
usually a maximum (which cannot exceed 32) which makes sense for each
|
||||
device. The size parameter should be set to the expected (maximum) size
|
||||
for each frame of data.
|
||||
|
||||
Each buffer (in the form of a struct videobuf_buffer pointer) will be
|
||||
passed to buf_prepare(), which should set the buffer's size, width, height,
|
||||
and field fields properly. If the buffer's state field is
|
||||
VIDEOBUF_NEEDS_INIT, the driver should pass it to:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
|
||||
struct v4l2_framebuffer *fbuf);
|
||||
|
||||
Among other things, this call will usually allocate memory for the buffer.
|
||||
Finally, the buf_prepare() function should set the buffer's state to
|
||||
VIDEOBUF_PREPARED.
|
||||
|
||||
When a buffer is queued for I/O, it is passed to buf_queue(), which should
|
||||
put it onto the driver's list of available buffers and set its state to
|
||||
VIDEOBUF_QUEUED. Note that this function is called with the queue spinlock
|
||||
held; if it tries to acquire it as well things will come to a screeching
|
||||
halt. Yes, this is the voice of experience. Note also that videobuf may
|
||||
wait on the first buffer in the queue; placing other buffers in front of it
|
||||
could again gum up the works. So use list_add_tail() to enqueue buffers.
|
||||
|
||||
Finally, buf_release() is called when a buffer is no longer intended to be
|
||||
used. The driver should ensure that there is no I/O active on the buffer,
|
||||
then pass it to the appropriate free routine(s):
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
/* Scatter/gather drivers */
|
||||
int videobuf_dma_unmap(struct videobuf_queue *q,
|
||||
struct videobuf_dmabuf *dma);
|
||||
int videobuf_dma_free(struct videobuf_dmabuf *dma);
|
||||
|
||||
/* vmalloc drivers */
|
||||
void videobuf_vmalloc_free (struct videobuf_buffer *buf);
|
||||
|
||||
/* Contiguous drivers */
|
||||
void videobuf_dma_contig_free(struct videobuf_queue *q,
|
||||
struct videobuf_buffer *buf);
|
||||
|
||||
One way to ensure that a buffer is no longer under I/O is to pass it to:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr);
|
||||
|
||||
Here, vb is the buffer, non_blocking indicates whether non-blocking I/O
|
||||
should be used (it should be zero in the buf_release() case), and intr
|
||||
controls whether an interruptible wait is used.
|
||||
|
||||
File operations
|
||||
---------------
|
||||
|
||||
At this point, much of the work is done; much of the rest is slipping
|
||||
videobuf calls into the implementation of the other driver callbacks. The
|
||||
first step is in the open() function, which must initialize the
|
||||
videobuf queue. The function to use depends on the type of buffer used:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
void videobuf_queue_sg_init(struct videobuf_queue *q,
|
||||
struct videobuf_queue_ops *ops,
|
||||
struct device *dev,
|
||||
spinlock_t *irqlock,
|
||||
enum v4l2_buf_type type,
|
||||
enum v4l2_field field,
|
||||
unsigned int msize,
|
||||
void *priv);
|
||||
|
||||
void videobuf_queue_vmalloc_init(struct videobuf_queue *q,
|
||||
struct videobuf_queue_ops *ops,
|
||||
struct device *dev,
|
||||
spinlock_t *irqlock,
|
||||
enum v4l2_buf_type type,
|
||||
enum v4l2_field field,
|
||||
unsigned int msize,
|
||||
void *priv);
|
||||
|
||||
void videobuf_queue_dma_contig_init(struct videobuf_queue *q,
|
||||
struct videobuf_queue_ops *ops,
|
||||
struct device *dev,
|
||||
spinlock_t *irqlock,
|
||||
enum v4l2_buf_type type,
|
||||
enum v4l2_field field,
|
||||
unsigned int msize,
|
||||
void *priv);
|
||||
|
||||
In each case, the parameters are the same: q is the queue structure for the
|
||||
device, ops is the set of callbacks as described above, dev is the device
|
||||
structure for this video device, irqlock is an interrupt-safe spinlock to
|
||||
protect access to the data structures, type is the buffer type used by the
|
||||
device (cameras will use V4L2_BUF_TYPE_VIDEO_CAPTURE, for example), field
|
||||
describes which field is being captured (often V4L2_FIELD_NONE for
|
||||
progressive devices), msize is the size of any containing structure used
|
||||
around struct videobuf_buffer, and priv is a private data pointer which
|
||||
shows up in the priv_data field of struct videobuf_queue. Note that these
|
||||
are void functions which, evidently, are immune to failure.
|
||||
|
||||
V4L2 capture drivers can be written to support either of two APIs: the
|
||||
read() system call and the rather more complicated streaming mechanism. As
|
||||
a general rule, it is necessary to support both to ensure that all
|
||||
applications have a chance of working with the device. Videobuf makes it
|
||||
easy to do that with the same code. To implement read(), the driver need
|
||||
only make a call to one of:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
ssize_t videobuf_read_one(struct videobuf_queue *q,
|
||||
char __user *data, size_t count,
|
||||
loff_t *ppos, int nonblocking);
|
||||
|
||||
ssize_t videobuf_read_stream(struct videobuf_queue *q,
|
||||
char __user *data, size_t count,
|
||||
loff_t *ppos, int vbihack, int nonblocking);
|
||||
|
||||
Either one of these functions will read frame data into data, returning the
|
||||
amount actually read; the difference is that videobuf_read_one() will only
|
||||
read a single frame, while videobuf_read_stream() will read multiple frames
|
||||
if they are needed to satisfy the count requested by the application. A
|
||||
typical driver read() implementation will start the capture engine, call
|
||||
one of the above functions, then stop the engine before returning (though a
|
||||
smarter implementation might leave the engine running for a little while in
|
||||
anticipation of another read() call happening in the near future).
|
||||
|
||||
The poll() function can usually be implemented with a direct call to:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
unsigned int videobuf_poll_stream(struct file *file,
|
||||
struct videobuf_queue *q,
|
||||
poll_table *wait);
|
||||
|
||||
Note that the actual wait queue eventually used will be the one associated
|
||||
with the first available buffer.
|
||||
|
||||
When streaming I/O is done to kernel-space buffers, the driver must support
|
||||
the mmap() system call to enable user space to access the data. In many
|
||||
V4L2 drivers, the often-complex mmap() implementation simplifies to a
|
||||
single call to:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
int videobuf_mmap_mapper(struct videobuf_queue *q,
|
||||
struct vm_area_struct *vma);
|
||||
|
||||
Everything else is handled by the videobuf code.
|
||||
|
||||
The release() function requires two separate videobuf calls:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
void videobuf_stop(struct videobuf_queue *q);
|
||||
int videobuf_mmap_free(struct videobuf_queue *q);
|
||||
|
||||
The call to videobuf_stop() terminates any I/O in progress - though it is
|
||||
still up to the driver to stop the capture engine. The call to
|
||||
videobuf_mmap_free() will ensure that all buffers have been unmapped; if
|
||||
so, they will all be passed to the buf_release() callback. If buffers
|
||||
remain mapped, videobuf_mmap_free() returns an error code instead. The
|
||||
purpose is clearly to cause the closing of the file descriptor to fail if
|
||||
buffers are still mapped, but every driver in the 2.6.32 kernel cheerfully
|
||||
ignores its return value.
|
||||
|
||||
ioctl() operations
|
||||
------------------
|
||||
|
||||
The V4L2 API includes a very long list of driver callbacks to respond to
|
||||
the many ioctl() commands made available to user space. A number of these
|
||||
- those associated with streaming I/O - turn almost directly into videobuf
|
||||
calls. The relevant helper functions are:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
int videobuf_reqbufs(struct videobuf_queue *q,
|
||||
struct v4l2_requestbuffers *req);
|
||||
int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b);
|
||||
int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b);
|
||||
int videobuf_dqbuf(struct videobuf_queue *q, struct v4l2_buffer *b,
|
||||
int nonblocking);
|
||||
int videobuf_streamon(struct videobuf_queue *q);
|
||||
int videobuf_streamoff(struct videobuf_queue *q);
|
||||
|
||||
So, for example, a VIDIOC_REQBUFS call turns into a call to the driver's
|
||||
vidioc_reqbufs() callback which, in turn, usually only needs to locate the
|
||||
proper struct videobuf_queue pointer and pass it to videobuf_reqbufs().
|
||||
These support functions can replace a great deal of buffer management
|
||||
boilerplate in a lot of V4L2 drivers.
|
||||
|
||||
The vidioc_streamon() and vidioc_streamoff() functions will be a bit more
|
||||
complex, of course, since they will also need to deal with starting and
|
||||
stopping the capture engine.
|
||||
|
||||
Buffer allocation
|
||||
-----------------
|
||||
|
||||
Thus far, we have talked about buffers, but have not looked at how they are
|
||||
allocated. The scatter/gather case is the most complex on this front. For
|
||||
allocation, the driver can leave buffer allocation entirely up to the
|
||||
videobuf layer; in this case, buffers will be allocated as anonymous
|
||||
user-space pages and will be very scattered indeed. If the application is
|
||||
using user-space buffers, no allocation is needed; the videobuf layer will
|
||||
take care of calling get_user_pages() and filling in the scatterlist array.
|
||||
|
||||
If the driver needs to do its own memory allocation, it should be done in
|
||||
the vidioc_reqbufs() function, *after* calling videobuf_reqbufs(). The
|
||||
first step is a call to:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
struct videobuf_dmabuf *videobuf_to_dma(struct videobuf_buffer *buf);
|
||||
|
||||
The returned videobuf_dmabuf structure (defined in
|
||||
<media/videobuf-dma-sg.h>) includes a couple of relevant fields:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
struct scatterlist *sglist;
|
||||
int sglen;
|
||||
|
||||
The driver must allocate an appropriately-sized scatterlist array and
|
||||
populate it with pointers to the pieces of the allocated buffer; sglen
|
||||
should be set to the length of the array.
|
||||
|
||||
Drivers using the vmalloc() method need not (and cannot) concern themselves
|
||||
with buffer allocation at all; videobuf will handle those details. The
|
||||
same is normally true of contiguous-DMA drivers as well; videobuf will
|
||||
allocate the buffers (with dma_alloc_coherent()) when it sees fit. That
|
||||
means that these drivers may be trying to do high-order allocations at any
|
||||
time, an operation which is not always guaranteed to work. Some drivers
|
||||
play tricks by allocating DMA space at system boot time; videobuf does not
|
||||
currently play well with those drivers.
|
||||
|
||||
As of 2.6.31, contiguous-DMA drivers can work with a user-supplied buffer,
|
||||
as long as that buffer is physically contiguous. Normal user-space
|
||||
allocations will not meet that criterion, but buffers obtained from other
|
||||
kernel drivers, or those contained within huge pages, will work with these
|
||||
drivers.
|
||||
|
||||
Filling the buffers
|
||||
-------------------
|
||||
|
||||
The final part of a videobuf implementation has no direct callback - it's
|
||||
the portion of the code which actually puts frame data into the buffers,
|
||||
usually in response to interrupts from the device. For all types of
|
||||
drivers, this process works approximately as follows:
|
||||
|
||||
- Obtain the next available buffer and make sure that somebody is actually
|
||||
waiting for it.
|
||||
|
||||
- Get a pointer to the memory and put video data there.
|
||||
|
||||
- Mark the buffer as done and wake up the process waiting for it.
|
||||
|
||||
Step (1) above is done by looking at the driver-managed list_head structure
|
||||
- the one which is filled in the buf_queue() callback. Because starting
|
||||
the engine and enqueueing buffers are done in separate steps, it's possible
|
||||
for the engine to be running without any buffers available - in the
|
||||
vmalloc() case especially. So the driver should be prepared for the list
|
||||
to be empty. It is equally possible that nobody is yet interested in the
|
||||
buffer; the driver should not remove it from the list or fill it until a
|
||||
process is waiting on it. That test can be done by examining the buffer's
|
||||
done field (a wait_queue_head_t structure) with waitqueue_active().
|
||||
|
||||
A buffer's state should be set to VIDEOBUF_ACTIVE before being mapped for
|
||||
DMA; that ensures that the videobuf layer will not try to do anything with
|
||||
it while the device is transferring data.
|
||||
|
||||
For scatter/gather drivers, the needed memory pointers will be found in the
|
||||
scatterlist structure described above. Drivers using the vmalloc() method
|
||||
can get a memory pointer with:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
void *videobuf_to_vmalloc(struct videobuf_buffer *buf);
|
||||
|
||||
For contiguous DMA drivers, the function to use is:
|
||||
|
||||
.. code-block:: none
|
||||
|
||||
dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf);
|
||||
|
||||
The contiguous DMA API goes out of its way to hide the kernel-space address
|
||||
of the DMA buffer from drivers.
|
||||
|
||||
The final step is to set the size field of the relevant videobuf_buffer
|
||||
structure to the actual size of the captured image, set state to
|
||||
VIDEOBUF_DONE, then call wake_up() on the done queue. At this point, the
|
||||
buffer is owned by the videobuf layer and the driver should not touch it
|
||||
again.
|
||||
|
||||
Developers who are interested in more information can go into the relevant
|
||||
header files; there are a few low-level functions declared there which have
|
||||
not been talked about here. Note also that all of these calls are exported
|
||||
GPL-only, so they will not be available to non-GPL kernel modules.
|
||||
|
|
@ -122,12 +122,9 @@ are exportable by setting the s_export_op field in the struct
|
|||
super_block. This field must point to a "struct export_operations"
|
||||
struct which has the following members:
|
||||
|
||||
encode_fh (optional)
|
||||
encode_fh (mandatory)
|
||||
Takes a dentry and creates a filehandle fragment which may later be used
|
||||
to find or create a dentry for the same object. The default
|
||||
implementation creates a filehandle fragment that encodes a 32bit inode
|
||||
and generation number for the inode encoded, and if necessary the
|
||||
same information for the parent.
|
||||
to find or create a dentry for the same object.
|
||||
|
||||
fh_to_dentry (mandatory)
|
||||
Given a filehandle fragment, this should find the implied object and
|
||||
|
|
|
|||
|
|
@ -344,10 +344,11 @@ escaping the colons with a single backslash. For example:
|
|||
|
||||
mount -t overlay overlay -olowerdir=/a\:lower\:\:dir /merged
|
||||
|
||||
Since kernel version v6.5, directory names containing colons can also
|
||||
be provided as lower layer using the fsconfig syscall from new mount api:
|
||||
Since kernel version v6.8, directory names containing colons can also
|
||||
be configured as lower layer using the "lowerdir+" mount options and the
|
||||
fsconfig syscall from new mount api. For example:
|
||||
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "lowerdir", "/a:lower::dir", 0);
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "lowerdir+", "/a:lower::dir", 0);
|
||||
|
||||
In the latter case, colons in lower layer directory names will be escaped
|
||||
as an octal characters (\072) when displayed in /proc/self/mountinfo.
|
||||
|
|
@ -416,6 +417,16 @@ Only the data of the files in the "data-only" lower layers may be visible
|
|||
when a "metacopy" file in one of the lower layers above it, has a "redirect"
|
||||
to the absolute path of the "lower data" file in the "data-only" lower layer.
|
||||
|
||||
Since kernel version v6.8, "data-only" lower layers can also be added using
|
||||
the "datadir+" mount options and the fsconfig syscall from new mount api.
|
||||
For example:
|
||||
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "lowerdir+", "/l1", 0);
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "lowerdir+", "/l2", 0);
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "lowerdir+", "/l3", 0);
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "datadir+", "/do1", 0);
|
||||
fsconfig(fs_fd, FSCONFIG_SET_STRING, "datadir+", "/do2", 0);
|
||||
|
||||
|
||||
fs-verity support
|
||||
----------------------
|
||||
|
|
@ -504,6 +515,29 @@ directory tree on the same or different underlying filesystem, and even
|
|||
to a different machine. With the "inodes index" feature, trying to mount
|
||||
the copied layers will fail the verification of the lower root file handle.
|
||||
|
||||
Nesting overlayfs mounts
|
||||
------------------------
|
||||
|
||||
It is possible to use a lower directory that is stored on an overlayfs
|
||||
mount. For regular files this does not need any special care. However, files
|
||||
that have overlayfs attributes, such as whiteouts or "overlay.*" xattrs will be
|
||||
interpreted by the underlying overlayfs mount and stripped out. In order to
|
||||
allow the second overlayfs mount to see the attributes they must be escaped.
|
||||
|
||||
Overlayfs specific xattrs are escaped by using a special prefix of
|
||||
"overlay.overlay.". So, a file with a "trusted.overlay.overlay.metacopy" xattr
|
||||
in the lower dir will be exposed as a regular file with a
|
||||
"trusted.overlay.metacopy" xattr in the overlayfs mount. This can be nested by
|
||||
repeating the prefix multiple time, as each instance only removes one prefix.
|
||||
|
||||
A lower dir with a regular whiteout will always be handled by the overlayfs
|
||||
mount, so to support storing an effective whiteout file in an overlayfs mount an
|
||||
alternative form of whiteout is supported. This form is a regular, zero-size
|
||||
file with the "overlay.whiteout" xattr set, inside a directory with the
|
||||
"overlay.whiteouts" xattr set. Such whiteouts are never created by overlayfs,
|
||||
but can be used by userspace tools (like containers) that generate lower layers.
|
||||
These alternative whiteouts can be escaped using the standard xattr escape
|
||||
mechanism in order to properly nest to any depth.
|
||||
|
||||
Non-standard behavior
|
||||
---------------------
|
||||
|
|
|
|||
|
|
@ -1052,3 +1052,12 @@ kill_anon_super(), or kill_block_super() helpers.
|
|||
|
||||
Lock ordering has been changed so that s_umount ranks above open_mutex again.
|
||||
All places where s_umount was taken under open_mutex have been fixed up.
|
||||
|
||||
---
|
||||
|
||||
**mandatory**
|
||||
|
||||
export_operations ->encode_fh() no longer has a default implementation to
|
||||
encode FILEID_INO32_GEN* file handles.
|
||||
Filesystems that used the default implementation may use the generic helper
|
||||
generic_encode_ino32_fh() explicitly.
|
||||
|
|
|
|||
|
|
@ -71,6 +71,10 @@ definitions:
|
|||
name: roce-bit
|
||||
-
|
||||
name: migratable-bit
|
||||
-
|
||||
name: ipsec-crypto-bit
|
||||
-
|
||||
name: ipsec-packet-bit
|
||||
-
|
||||
type: enum
|
||||
name: sb-threshold-type
|
||||
|
|
|
|||
|
|
@ -44,18 +44,16 @@ smcr_testlink_time - INTEGER
|
|||
|
||||
wmem - INTEGER
|
||||
Initial size of send buffer used by SMC sockets.
|
||||
The default value inherits from net.ipv4.tcp_wmem[1].
|
||||
|
||||
The minimum value is 16KiB and there is no hard limit for max value, but
|
||||
only allowed 512KiB for SMC-R and 1MiB for SMC-D.
|
||||
|
||||
Default: 16K
|
||||
Default: 64KiB
|
||||
|
||||
rmem - INTEGER
|
||||
Initial size of receive buffer (RMB) used by SMC sockets.
|
||||
The default value inherits from net.ipv4.tcp_rmem[1].
|
||||
|
||||
The minimum value is 16KiB and there is no hard limit for max value, but
|
||||
only allowed 512KiB for SMC-R and 1MiB for SMC-D.
|
||||
|
||||
Default: 128K
|
||||
Default: 64KiB
|
||||
|
|
|
|||
|
|
@ -59,8 +59,12 @@ Synopsis of fprobe-events
|
|||
and bitfield are supported.
|
||||
|
||||
(\*1) This is available only when BTF is enabled.
|
||||
(\*2) only for the probe on function entry (offs == 0).
|
||||
(\*3) only for return probe.
|
||||
(\*2) only for the probe on function entry (offs == 0). Note, this argument access
|
||||
is best effort, because depending on the argument type, it may be passed on
|
||||
the stack. But this only support the arguments via registers.
|
||||
(\*3) only for return probe. Note that this is also best effort. Depending on the
|
||||
return value type, it might be passed via a pair of registers. But this only
|
||||
accesses one register.
|
||||
(\*4) this is useful for fetching a field of data structures.
|
||||
(\*5) "u" means user-space dereference.
|
||||
|
||||
|
|
|
|||
|
|
@ -61,8 +61,12 @@ Synopsis of kprobe_events
|
|||
(x8/x16/x32/x64), "char", "string", "ustring", "symbol", "symstr"
|
||||
and bitfield are supported.
|
||||
|
||||
(\*1) only for the probe on function entry (offs == 0).
|
||||
(\*2) only for return probe.
|
||||
(\*1) only for the probe on function entry (offs == 0). Note, this argument access
|
||||
is best effort, because depending on the argument type, it may be passed on
|
||||
the stack. But this only support the arguments via registers.
|
||||
(\*2) only for return probe. Note that this is also best effort. Depending on the
|
||||
return value type, it might be passed via a pair of registers. But this only
|
||||
accesses one register.
|
||||
(\*3) this is useful for fetching a field of data structures.
|
||||
(\*4) "u" means user-space dereference. See :ref:`user_mem_access`.
|
||||
|
||||
|
|
|
|||
|
|
@ -768,18 +768,6 @@ const char *video_device_node_name(struct video_device *vdev);
|
|||
此功能，而非访问 video_device::num 和 video_device::minor 域。
|
||||
|
||||
|
||||
视频缓冲辅助函数
|
||||
---------------
|
||||
|
||||
v4l2 核心 API 提供了一个处理视频缓冲的标准方法(称为“videobuf”)。
|
||||
这些方法使驱动可以通过统一的方式实现 read()、mmap() 和 overlay()。
|
||||
目前在设备上支持视频缓冲的方法有分散/聚集 DMA(videobuf-dma-sg)、
|
||||
线性 DMA(videobuf-dma-contig)以及大多用于 USB 设备的用 vmalloc
|
||||
分配的缓冲(videobuf-vmalloc)。
|
||||
|
||||
请参阅 Documentation/driver-api/media/v4l2-videobuf.rst，以获得更多关于 videobuf
|
||||
层的使用信息。
|
||||
|
||||
v4l2_fh 结构体
|
||||
-------------
|
||||
|
||||
|
|
|
|||
104
Documentation/userspace-api/media/drivers/camera-sensor.rst
Normal file
104
Documentation/userspace-api/media/drivers/camera-sensor.rst
Normal file
|
|
@ -0,0 +1,104 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
.. _media_using_camera_sensor_drivers:
|
||||
|
||||
Using camera sensor drivers
|
||||
===========================
|
||||
|
||||
This section describes common practices for how the V4L2 sub-device interface is
|
||||
used to control the camera sensor drivers.
|
||||
|
||||
You may also find :ref:`media_writing_camera_sensor_drivers` useful.
|
||||
|
||||
Frame size
|
||||
----------
|
||||
|
||||
There are two distinct ways to configure the frame size produced by camera
|
||||
sensors.
|
||||
|
||||
Freely configurable camera sensor drivers
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Freely configurable camera sensor drivers expose the device's internal
|
||||
processing pipeline as one or more sub-devices with different cropping and
|
||||
scaling configurations. The output size of the device is the result of a series
|
||||
of cropping and scaling operations from the device's pixel array's size.
|
||||
|
||||
An example of such a driver is the CCS driver.
|
||||
|
||||
Register list based drivers
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Register list based drivers generally, instead of able to configure the device
|
||||
they control based on user requests, are limited to a number of preset
|
||||
configurations that combine a number of different parameters that on hardware
|
||||
level are independent. How a driver picks such configuration is based on the
|
||||
format set on a source pad at the end of the device's internal pipeline.
|
||||
|
||||
Most sensor drivers are implemented this way.
|
||||
|
||||
Frame interval configuration
|
||||
----------------------------
|
||||
|
||||
There are two different methods for obtaining possibilities for different frame
|
||||
intervals as well as configuring the frame interval. Which one to implement
|
||||
depends on the type of the device.
|
||||
|
||||
Raw camera sensors
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Instead of a high level parameter such as frame interval, the frame interval is
|
||||
a result of the configuration of a number of camera sensor implementation
|
||||
specific parameters. Luckily, these parameters tend to be the same for more or
|
||||
less all modern raw camera sensors.
|
||||
|
||||
The frame interval is calculated using the following equation::
|
||||
|
||||
frame interval = (analogue crop width + horizontal blanking) *
|
||||
(analogue crop height + vertical blanking) / pixel rate
|
||||
|
||||
The formula is bus independent and is applicable for raw timing parameters on
|
||||
large variety of devices beyond camera sensors. Devices that have no analogue
|
||||
crop, use the full source image size, i.e. pixel array size.
|
||||
|
||||
Horizontal and vertical blanking are specified by ``V4L2_CID_HBLANK`` and
|
||||
``V4L2_CID_VBLANK``, respectively. The unit of the ``V4L2_CID_HBLANK`` control
|
||||
is pixels and the unit of the ``V4L2_CID_VBLANK`` is lines. The pixel rate in
|
||||
the sensor's **pixel array** is specified by ``V4L2_CID_PIXEL_RATE`` in the same
|
||||
sub-device. The unit of that control is pixels per second.
|
||||
|
||||
Register list based drivers need to implement read-only sub-device nodes for the
|
||||
purpose. Devices that are not register list based need these to configure the
|
||||
device's internal processing pipeline.
|
||||
|
||||
The first entity in the linear pipeline is the pixel array. The pixel array may
|
||||
be followed by other entities that are there to allow configuring binning,
|
||||
skipping, scaling or digital crop, see :ref:`VIDIOC_SUBDEV_G_SELECTION
|
||||
<VIDIOC_SUBDEV_G_SELECTION>`.
|
||||
|
||||
USB cameras etc. devices
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
USB video class hardware, as well as many cameras offering a similar higher
|
||||
level interface natively, generally use the concept of frame interval (or frame
|
||||
rate) on device level in firmware or hardware. This means lower level controls
|
||||
implemented by raw cameras may not be used on uAPI (or even kAPI) to control the
|
||||
frame interval on these devices.
|
||||
|
||||
Rotation, orientation and flipping
|
||||
----------------------------------
|
||||
|
||||
Some systems have the camera sensor mounted upside down compared to its natural
|
||||
mounting rotation. In such cases, drivers shall expose the information to
|
||||
userspace with the :ref:`V4L2_CID_CAMERA_SENSOR_ROTATION
|
||||
<v4l2-camera-sensor-rotation>` control.
|
||||
|
||||
Sensor drivers shall also report the sensor's mounting orientation with the
|
||||
:ref:`V4L2_CID_CAMERA_SENSOR_ORIENTATION <v4l2-camera-sensor-orientation>`.
|
||||
|
||||
Sensor drivers that have any vertical or horizontal flips embedded in the
|
||||
register programming sequences shall initialize the :ref:`V4L2_CID_HFLIP
|
||||
<v4l2-cid-hflip>` and :ref:`V4L2_CID_VFLIP <v4l2-cid-vflip>` controls with the
|
||||
values programmed by the register sequences. The default values of these
|
||||
controls shall be 0 (disabled). Especially these controls shall not be inverted,
|
||||
independently of the sensor's mounting rotation.
|
||||
|
|
@ -32,11 +32,13 @@ For more details see the file COPYING in the source distribution of Linux.
|
|||
:numbered:
|
||||
|
||||
aspeed-video
|
||||
camera-sensor
|
||||
ccs
|
||||
cx2341x-uapi
|
||||
dw100
|
||||
imx-uapi
|
||||
max2175
|
||||
npcm-video
|
||||
omap3isp-uapi
|
||||
st-vgxy61
|
||||
uvcvideo
|
||||
|
|
|
|||
66
Documentation/userspace-api/media/drivers/npcm-video.rst
Normal file
66
Documentation/userspace-api/media/drivers/npcm-video.rst
Normal file
|
|
@ -0,0 +1,66 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
.. include:: <isonum.txt>
|
||||
|
||||
NPCM video driver
|
||||
=================
|
||||
|
||||
This driver is used to control the Video Capture/Differentiation (VCD) engine
|
||||
and Encoding Compression Engine (ECE) present on Nuvoton NPCM SoCs. The VCD can
|
||||
capture a frame from digital video input and compare two frames in memory, and
|
||||
the ECE can compress the frame data into HEXTILE format.
|
||||
|
||||
Driver-specific Controls
|
||||
------------------------
|
||||
|
||||
V4L2_CID_NPCM_CAPTURE_MODE
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
The VCD engine supports two modes:
|
||||
|
||||
- COMPLETE mode:
|
||||
|
||||
Capture the next complete frame into memory.
|
||||
|
||||
- DIFF mode:
|
||||
|
||||
Compare the incoming frame with the frame stored in memory, and updates the
|
||||
differentiated frame in memory.
|
||||
|
||||
Application can use ``V4L2_CID_NPCM_CAPTURE_MODE`` control to set the VCD mode
|
||||
with different control values (enum v4l2_npcm_capture_mode):
|
||||
|
||||
- ``V4L2_NPCM_CAPTURE_MODE_COMPLETE``: will set VCD to COMPLETE mode.
|
||||
- ``V4L2_NPCM_CAPTURE_MODE_DIFF``: will set VCD to DIFF mode.
|
||||
|
||||
V4L2_CID_NPCM_RECT_COUNT
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
If using V4L2_PIX_FMT_HEXTILE format, VCD will capture frame data and then ECE
|
||||
will compress the data into HEXTILE rectangles and store them in V4L2 video
|
||||
buffer with the layout defined in Remote Framebuffer Protocol:
|
||||
::
|
||||
|
||||
(RFC 6143, https://www.rfc-editor.org/rfc/rfc6143.html#section-7.6.1)
|
||||
|
||||
+--------------+--------------+-------------------+
|
||||
| No. of bytes | Type [Value] | Description |
|
||||
+--------------+--------------+-------------------+
|
||||
| 2 | U16 | x-position |
|
||||
| 2 | U16 | y-position |
|
||||
| 2 | U16 | width |
|
||||
| 2 | U16 | height |
|
||||
| 4 | S32 | encoding-type (5) |
|
||||
+--------------+--------------+-------------------+
|
||||
| HEXTILE rectangle data |
|
||||
+-------------------------------------------------+
|
||||
|
||||
Application can get the video buffer through VIDIOC_DQBUF, and followed by
|
||||
calling ``V4L2_CID_NPCM_RECT_COUNT`` control to get the number of HEXTILE
|
||||
rectangles in this buffer.
|
||||
|
||||
References
|
||||
----------
|
||||
include/uapi/linux/npcm-video.h
|
||||
|
||||
**Copyright** |copy| 2022 Nuvoton Technologies
|
||||
|
|
@ -59,9 +59,7 @@ Generic Error Codes
|
|||
|
||||
- - ``ENOTTY``
|
||||
|
||||
- The ioctl is not supported by the driver, actually meaning that
|
||||
the required functionality is not available, or the file
|
||||
descriptor is not for a media device.
|
||||
- The ioctl is not supported by the file descriptor.
|
||||
|
||||
- - ``ENOSPC``
|
||||
|
||||
|
|
|
|||
|
|
@ -549,9 +549,9 @@ Buffer Flags
|
|||
- 0x00000400
|
||||
- The buffer has been prepared for I/O and can be queued by the
|
||||
application. Drivers set or clear this flag when the
|
||||
:ref:`VIDIOC_QUERYBUF`,
|
||||
:ref:`VIDIOC_QUERYBUF <VIDIOC_QUERYBUF>`,
|
||||
:ref:`VIDIOC_PREPARE_BUF <VIDIOC_QBUF>`,
|
||||
:ref:`VIDIOC_QBUF` or
|
||||
:ref:`VIDIOC_QBUF <VIDIOC_QBUF>` or
|
||||
:ref:`VIDIOC_DQBUF <VIDIOC_QBUF>` ioctl is called.
|
||||
* .. _`V4L2-BUF-FLAG-NO-CACHE-INVALIDATE`:
|
||||
|
||||
|
|
|
|||
|
|
@ -143,9 +143,13 @@ Control IDs
|
|||
recognise the difference between digital and analogue gain use
|
||||
controls ``V4L2_CID_DIGITAL_GAIN`` and ``V4L2_CID_ANALOGUE_GAIN``.
|
||||
|
||||
.. _v4l2-cid-hflip:
|
||||
|
||||
``V4L2_CID_HFLIP`` ``(boolean)``
|
||||
Mirror the picture horizontally.
|
||||
|
||||
.. _v4l2-cid-vflip:
|
||||
|
||||
``V4L2_CID_VFLIP`` ``(boolean)``
|
||||
Mirror the picture vertically.
|
||||
|
||||
|
|
|
|||
|
|
@ -579,20 +579,19 @@ is started.
|
|||
|
||||
There are three steps in configuring the streams:
|
||||
|
||||
1) Set up links. Connect the pads between sub-devices using the :ref:`Media
|
||||
Controller API <media_controller>`
|
||||
1. Set up links. Connect the pads between sub-devices using the
|
||||
:ref:`Media Controller API <media_controller>`
|
||||
|
||||
2) Streams. Streams are declared and their routing is configured by
|
||||
setting the routing table for the sub-device using
|
||||
:ref:`VIDIOC_SUBDEV_S_ROUTING <VIDIOC_SUBDEV_G_ROUTING>` ioctl. Note that
|
||||
setting the routing table will reset formats and selections in the
|
||||
sub-device to default values.
|
||||
2. Streams. Streams are declared and their routing is configured by setting the
|
||||
routing table for the sub-device using :ref:`VIDIOC_SUBDEV_S_ROUTING
|
||||
<VIDIOC_SUBDEV_G_ROUTING>` ioctl. Note that setting the routing table will
|
||||
reset formats and selections in the sub-device to default values.
|
||||
|
||||
3) Configure formats and selections. Formats and selections of each stream
|
||||
are configured separately as documented for plain sub-devices in
|
||||
:ref:`format-propagation`. The stream ID is set to the same stream ID
|
||||
associated with either sink or source pads of routes configured using the
|
||||
:ref:`VIDIOC_SUBDEV_S_ROUTING <VIDIOC_SUBDEV_G_ROUTING>` ioctl.
|
||||
3. Configure formats and selections. Formats and selections of each stream are
|
||||
configured separately as documented for plain sub-devices in
|
||||
:ref:`format-propagation`. The stream ID is set to the same stream ID
|
||||
associated with either sink or source pads of routes configured using the
|
||||
:ref:`VIDIOC_SUBDEV_S_ROUTING <VIDIOC_SUBDEV_G_ROUTING>` ioctl.
|
||||
|
||||
Multiplexed streams setup example
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
|
@ -618,11 +617,11 @@ modeled as V4L2 devices, exposed to userspace via /dev/videoX nodes.
|
|||
|
||||
To configure this pipeline, the userspace must take the following steps:
|
||||
|
||||
1) Set up media links between entities: connect the sensors to the bridge,
|
||||
bridge to the receiver, and the receiver to the DMA engines. This step does
|
||||
not differ from normal non-multiplexed media controller setup.
|
||||
1. Set up media links between entities: connect the sensors to the bridge,
|
||||
bridge to the receiver, and the receiver to the DMA engines. This step does
|
||||
not differ from normal non-multiplexed media controller setup.
|
||||
|
||||
2) Configure routing
|
||||
2. Configure routing
|
||||
|
||||
.. flat-table:: Bridge routing table
|
||||
:header-rows: 1
|
||||
|
|
@ -656,14 +655,14 @@ not differ from normal non-multiplexed media controller setup.
|
|||
- V4L2_SUBDEV_ROUTE_FL_ACTIVE
|
||||
- Pixel data stream from Sensor B
|
||||
|
||||
3) Configure formats and selections
|
||||
3. Configure formats and selections
|
||||
|
||||
After configuring routing, the next step is configuring the formats and
|
||||
selections for the streams. This is similar to performing this step without
|
||||
streams, with just one exception: the ``stream`` field needs to be assigned
|
||||
to the value of the stream ID.
|
||||
After configuring routing, the next step is configuring the formats and
|
||||
selections for the streams. This is similar to performing this step without
|
||||
streams, with just one exception: the ``stream`` field needs to be assigned
|
||||
to the value of the stream ID.
|
||||
|
||||
A common way to accomplish this is to start from the sensors and propagate the
|
||||
configurations along the stream towards the receiver,
|
||||
using :ref:`VIDIOC_SUBDEV_S_FMT <VIDIOC_SUBDEV_G_FMT>` ioctls to configure each
|
||||
stream endpoint in each sub-device.
|
||||
A common way to accomplish this is to start from the sensors and propagate
|
||||
the configurations along the stream towards the receiver, using
|
||||
:ref:`VIDIOC_SUBDEV_S_FMT <VIDIOC_SUBDEV_G_FMT>` ioctls to configure each
|
||||
stream endpoint in each sub-device.
|
||||
|
|
|
|||
|
|
@ -33,6 +33,27 @@ current DV timings they use the
|
|||
the DV timings as seen by the video receiver applications use the
|
||||
:ref:`VIDIOC_QUERY_DV_TIMINGS` ioctl.
|
||||
|
||||
When the hardware detects a video source change (e.g. the video
|
||||
signal appears or disappears, or the video resolution changes), then
|
||||
it will issue a `V4L2_EVENT_SOURCE_CHANGE` event. Use the
|
||||
:ref:`ioctl VIDIOC_SUBSCRIBE_EVENT <VIDIOC_SUBSCRIBE_EVENT>` and the
|
||||
:ref:`VIDIOC_DQEVENT` to check if this event was reported.
|
||||
|
||||
If the video signal changed, then the application has to stop
|
||||
streaming, free all buffers, and call the :ref:`VIDIOC_QUERY_DV_TIMINGS`
|
||||
to obtain the new video timings, and if they are valid, it can set
|
||||
those by calling the :ref:`ioctl VIDIOC_S_DV_TIMINGS <VIDIOC_G_DV_TIMINGS>`.
|
||||
This will also update the format, so use the :ref:`ioctl VIDIOC_G_FMT <VIDIOC_G_FMT>`
|
||||
to obtain the new format. Now the application can allocate new buffers
|
||||
and start streaming again.
|
||||
|
||||
The :ref:`VIDIOC_QUERY_DV_TIMINGS` will just report what the
|
||||
hardware detects, it will never change the configuration. If the
|
||||
currently set timings and the actually detected timings differ, then
|
||||
typically this will mean that you will not be able to capture any
|
||||
video. The correct approach is to rely on the `V4L2_EVENT_SOURCE_CHANGE`
|
||||
event so you know when something changed.
|
||||
|
||||
Applications can make use of the :ref:`input-capabilities` and
|
||||
:ref:`output-capabilities` flags to determine whether the digital
|
||||
video ioctls can be used with the given input or output.
|
||||
|
|
|
|||
|
|
@ -288,6 +288,13 @@ please make a proposal on the linux-media mailing list.
|
|||
- 'MT2110R'
|
||||
- This format is two-planar 10-Bit raster mode and having similitude with
|
||||
``V4L2_PIX_FMT_MM21`` in term of alignment and tiling. Used for AVC.
|
||||
* .. _V4L2-PIX-FMT-HEXTILE:
|
||||
|
||||
- ``V4L2_PIX_FMT_HEXTILE``
|
||||
- 'HXTL'
|
||||
- Compressed format used by Nuvoton NPCM video driver. This format is
|
||||
defined in Remote Framebuffer Protocol (RFC 6143, chapter 7.7.4 Hextile
|
||||
Encoding).
|
||||
.. raw:: latex
|
||||
|
||||
\normalsize
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@ Each cell is one byte.
|
|||
G\ :sub:`10low`\ (bits 3--0)
|
||||
- G\ :sub:`12high`
|
||||
- R\ :sub:`13high`
|
||||
- R\ :sub:`13low`\ (bits 3--2)
|
||||
- R\ :sub:`13low`\ (bits 7--4)
|
||||
|
||||
G\ :sub:`12low`\ (bits 3--0)
|
||||
- - start + 12:
|
||||
|
|
@ -82,6 +82,6 @@ Each cell is one byte.
|
|||
G\ :sub:`30low`\ (bits 3--0)
|
||||
- G\ :sub:`32high`
|
||||
- R\ :sub:`33high`
|
||||
- R\ :sub:`33low`\ (bits 3--2)
|
||||
- R\ :sub:`33low`\ (bits 7--4)
|
||||
|
||||
G\ :sub:`32low`\ (bits 3--0)
|
||||
|
|
|
|||
|
|
@ -949,6 +949,78 @@ The following tables list existing packed RGB formats.
|
|||
- b\ :sub:`2`
|
||||
- b\ :sub:`1`
|
||||
- b\ :sub:`0`
|
||||
* .. _MEDIA-BUS-FMT-RGB666-2X9-BE:
|
||||
|
||||
- MEDIA_BUS_FMT_RGB666_2X9_BE
|
||||
- 0x1025
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
- r\ :sub:`5`
|
||||
- r\ :sub:`4`
|
||||
- r\ :sub:`3`
|
||||
- r\ :sub:`2`
|
||||
- r\ :sub:`1`
|
||||
- r\ :sub:`0`
|
||||
- g\ :sub:`5`
|
||||
- g\ :sub:`4`
|
||||
- g\ :sub:`3`
|
||||
* -
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
-
|
||||
- g\ :sub:`2`
|
||||
- g\ :sub:`1`
|
||||
- g\ :sub:`0`
|
||||
- b\ :sub:`5`
|
||||
- b\ :sub:`4`
|
||||
- b\ :sub:`3`
|
||||
- b\ :sub:`2`
|
||||
- b\ :sub:`1`
|
||||
- b\ :sub:`0`
|
||||
* .. _MEDIA-BUS-FMT-BGR666-1X18:
|
||||
|
||||
- MEDIA_BUS_FMT_BGR666_1X18
|
||||
|
|
|
|||
153
MAINTAINERS
153
MAINTAINERS
|
|
@ -311,7 +311,7 @@ ACPI COMPONENT ARCHITECTURE (ACPICA)
|
|||
M: Robert Moore <robert.moore@intel.com>
|
||||
M: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
|
||||
L: linux-acpi@vger.kernel.org
|
||||
L: acpica-devel@lists.linuxfoundation.org
|
||||
L: acpica-devel@lists.linux.dev
|
||||
S: Supported
|
||||
W: https://acpica.org/
|
||||
W: https://github.com/acpica/acpica/
|
||||
|
|
@ -2510,6 +2510,18 @@ F: drivers/rtc/rtc-nct3018y.c
|
|||
F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
|
||||
F: include/dt-bindings/clock/nuvoton,npcm845-clk.h
|
||||
|
||||
ARM/NUVOTON NPCM VIDEO ENGINE DRIVER
|
||||
M: Joseph Liu <kwliu@nuvoton.com>
|
||||
M: Marvin Lin <kflin@nuvoton.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/media/nuvoton,npcm-ece.yaml
|
||||
F: Documentation/devicetree/bindings/media/nuvoton,npcm-vcd.yaml
|
||||
F: Documentation/userspace-api/media/drivers/npcm-video.rst
|
||||
F: drivers/media/platform/nuvoton/
|
||||
F: include/uapi/linux/npcm-video.h
|
||||
|
||||
ARM/NUVOTON WPCM450 ARCHITECTURE
|
||||
M: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
|
||||
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
|
||||
|
|
@ -6143,6 +6155,13 @@ L: linux-gpio@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/gpio/gpio-gpio-mm.c
|
||||
|
||||
DIGITEQ AUTOMOTIVE MGB4 V4L2 DRIVER
|
||||
M: Martin Tuma <martin.tuma@digiteqautomotive.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/admin-guide/media/mgb4.rst
|
||||
F: drivers/media/pci/mgb4/
|
||||
|
||||
DIOLAN U2C-12 I2C DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
|
|
@ -6515,7 +6534,7 @@ F: drivers/gpu/drm/ast/
|
|||
|
||||
DRM DRIVER FOR BOCHS VIRTUAL GPU
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
F: drivers/gpu/drm/tiny/bochs.c
|
||||
|
|
@ -6762,7 +6781,7 @@ F: drivers/gpu/drm/tiny/repaper.c
|
|||
DRM DRIVER FOR QEMU'S CIRRUS DEVICE
|
||||
M: Dave Airlie <airlied@redhat.com>
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Obsolete
|
||||
W: https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmful/
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
|
@ -6771,7 +6790,7 @@ F: drivers/gpu/drm/tiny/cirrus.c
|
|||
DRM DRIVER FOR QXL VIRTUAL GPU
|
||||
M: Dave Airlie <airlied@redhat.com>
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: spice-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
|
@ -7114,7 +7133,7 @@ F: drivers/gpu/host1x/
|
|||
F: include/linux/host1x.h
|
||||
F: include/uapi/drm/tegra_drm.h
|
||||
|
||||
DRM DRIVERS FOR RENESAS
|
||||
DRM DRIVERS FOR RENESAS R-CAR
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
M: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
|
|
@ -7125,7 +7144,16 @@ F: Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml
|
|||
F: Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
|
||||
F: Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
|
||||
F: Documentation/devicetree/bindings/display/renesas,du.yaml
|
||||
F: drivers/gpu/drm/renesas/
|
||||
F: drivers/gpu/drm/renesas/rcar-du/
|
||||
|
||||
DRM DRIVERS FOR RENESAS SHMOBILE
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
M: Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: linux-renesas-soc@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/display/renesas,shmobile-lcdc.yaml
|
||||
F: drivers/gpu/drm/renesas/shmobile/
|
||||
F: include/linux/platform_data/shmob_drm.h
|
||||
|
||||
DRM DRIVERS FOR ROCKCHIP
|
||||
|
|
@ -7861,7 +7889,7 @@ F: drivers/net/can/usb/etas_es58x/
|
|||
ETHERNET BRIDGE
|
||||
M: Roopa Prabhu <roopa@nvidia.com>
|
||||
M: Nikolay Aleksandrov <razor@blackwall.org>
|
||||
L: bridge@lists.linux-foundation.org (moderated for non-subscribers)
|
||||
L: bridge@lists.linux.dev
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://www.linuxfoundation.org/en/Net:Bridge
|
||||
|
|
@ -8137,6 +8165,27 @@ F: include/linux/fs_types.h
|
|||
F: include/uapi/linux/fs.h
|
||||
F: include/uapi/linux/openat2.h
|
||||
|
||||
FILESYSTEMS [EXPORTFS]
|
||||
M: Chuck Lever <chuck.lever@oracle.com>
|
||||
M: Jeff Layton <jlayton@kernel.org>
|
||||
R: Amir Goldstein <amir73il@gmail.com>
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
L: linux-nfs@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/filesystems/nfs/exporting.rst
|
||||
F: fs/exportfs/
|
||||
F: fs/fhandle.c
|
||||
F: include/linux/exportfs.h
|
||||
|
||||
FILESYSTEMS [IOMAP]
|
||||
M: Christian Brauner <brauner@kernel.org>
|
||||
R: Darrick J. Wong <djwong@kernel.org>
|
||||
L: linux-xfs@vger.kernel.org
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
S: Supported
|
||||
F: fs/iomap/
|
||||
F: include/linux/iomap.h
|
||||
|
||||
FINTEK F75375S HARDWARE MONITOR AND FAN CONTROLLER DRIVER
|
||||
M: Riku Voipio <riku.voipio@iki.fi>
|
||||
L: linux-hwmon@vger.kernel.org
|
||||
|
|
@ -11057,15 +11106,6 @@ L: linux-mips@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/net/ethernet/sgi/ioc3-eth.c
|
||||
|
||||
IOMAP FILESYSTEM LIBRARY
|
||||
M: Darrick J. Wong <djwong@kernel.org>
|
||||
L: linux-xfs@vger.kernel.org
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/fs/xfs/xfs-linux.git
|
||||
F: fs/iomap/
|
||||
F: include/linux/iomap.h
|
||||
|
||||
IOMMU DMA-API LAYER
|
||||
M: Robin Murphy <robin.murphy@arm.com>
|
||||
L: iommu@lists.linux.dev
|
||||
|
|
@ -11529,7 +11569,6 @@ S: Supported
|
|||
W: http://nfs.sourceforge.net/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux.git
|
||||
F: Documentation/filesystems/nfs/
|
||||
F: fs/exportfs/
|
||||
F: fs/lockd/
|
||||
F: fs/nfs_common/
|
||||
F: fs/nfsd/
|
||||
|
|
@ -14684,6 +14723,14 @@ L: linux-mtd@lists.infradead.org
|
|||
S: Maintained
|
||||
F: drivers/mtd/devices/docg3*
|
||||
|
||||
MT9M114 ONSEMI SENSOR DRIVER
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml
|
||||
F: drivers/media/i2c/mt9m114.c
|
||||
|
||||
MT9P031 APTINA CAMERA SENSOR
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
|
@ -15926,7 +15973,7 @@ L: linux-media@vger.kernel.org
|
|||
S: Maintained
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: Documentation/devicetree/bindings/media/i2c/ovti,ov4689.yaml
|
||||
F: drivers/media/i2c/ov5647.c
|
||||
F: drivers/media/i2c/ov4689.c
|
||||
|
||||
OMNIVISION OV5640 SENSOR DRIVER
|
||||
M: Steve Longerbeam <slongerbeam@gmail.com>
|
||||
|
|
@ -16016,8 +16063,7 @@ F: Documentation/devicetree/bindings/media/i2c/ovti,ov8858.yaml
|
|||
F: drivers/media/i2c/ov8858.c
|
||||
|
||||
OMNIVISION OV9282 SENSOR DRIVER
|
||||
M: Paul J. Murphy <paul.j.murphy@intel.com>
|
||||
M: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
|
||||
M: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
|
@ -16348,7 +16394,7 @@ M: Juergen Gross <jgross@suse.com>
|
|||
R: Ajay Kaher <akaher@vmware.com>
|
||||
R: Alexey Makhalov <amakhalov@vmware.com>
|
||||
R: VMware PV-Drivers Reviewers <pv-drivers@vmware.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: x86@kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
|
||||
|
|
@ -18666,6 +18712,7 @@ F: sound/soc/rockchip/rockchip_i2s_tdm.*
|
|||
|
||||
ROCKCHIP ISP V1 DRIVER
|
||||
M: Dafna Hirschfeld <dafna@fastmail.com>
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: linux-rockchip@lists.infradead.org
|
||||
S: Maintained
|
||||
|
|
@ -20160,19 +20207,15 @@ T: git git://linuxtv.org/media_tree.git
|
|||
F: drivers/media/i2c/imx319.c
|
||||
|
||||
SONY IMX334 SENSOR DRIVER
|
||||
M: Paul J. Murphy <paul.j.murphy@intel.com>
|
||||
M: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml
|
||||
F: drivers/media/i2c/imx334.c
|
||||
|
||||
SONY IMX335 SENSOR DRIVER
|
||||
M: Paul J. Murphy <paul.j.murphy@intel.com>
|
||||
M: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml
|
||||
F: drivers/media/i2c/imx335.c
|
||||
|
|
@ -20185,10 +20228,8 @@ T: git git://linuxtv.org/media_tree.git
|
|||
F: drivers/media/i2c/imx355.c
|
||||
|
||||
SONY IMX412 SENSOR DRIVER
|
||||
M: Paul J. Murphy <paul.j.murphy@intel.com>
|
||||
M: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
F: Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml
|
||||
F: drivers/media/i2c/imx412.c
|
||||
|
|
@ -21752,6 +21793,13 @@ F: Documentation/devicetree/bindings/media/i2c/ti,ds90*
|
|||
F: drivers/media/i2c/ds90*
|
||||
F: include/media/i2c/ds90*
|
||||
|
||||
TI J721E CSI2RX DRIVER
|
||||
M: Jai Luthra <j-luthra@ti.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml
|
||||
F: drivers/media/platform/ti/j721e-csi2rx/
|
||||
|
||||
TI KEYSTONE MULTICORE NAVIGATOR DRIVERS
|
||||
M: Nishanth Menon <nm@ti.com>
|
||||
M: Santosh Shilimkar <ssantosh@kernel.org>
|
||||
|
|
@ -22924,7 +22972,7 @@ VIRTIO AND VHOST VSOCK DRIVER
|
|||
M: Stefan Hajnoczi <stefanha@redhat.com>
|
||||
M: Stefano Garzarella <sgarzare@redhat.com>
|
||||
L: kvm@vger.kernel.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/vhost/vsock.c
|
||||
|
|
@ -22936,7 +22984,7 @@ F: net/vmw_vsock/virtio_transport_common.c
|
|||
VIRTIO BALLOON
|
||||
M: "Michael S. Tsirkin" <mst@redhat.com>
|
||||
M: David Hildenbrand <david@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/virtio/virtio_balloon.c
|
||||
F: include/linux/balloon_compaction.h
|
||||
|
|
@ -22948,7 +22996,7 @@ M: "Michael S. Tsirkin" <mst@redhat.com>
|
|||
M: Jason Wang <jasowang@redhat.com>
|
||||
R: Paolo Bonzini <pbonzini@redhat.com>
|
||||
R: Stefan Hajnoczi <stefanha@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/block/virtio_blk.c
|
||||
F: drivers/scsi/virtio_scsi.c
|
||||
|
|
@ -22957,7 +23005,7 @@ F: include/uapi/linux/virtio_scsi.h
|
|||
|
||||
VIRTIO CONSOLE DRIVER
|
||||
M: Amit Shah <amit@kernel.org>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/char/virtio_console.c
|
||||
F: include/linux/virtio_console.h
|
||||
|
|
@ -22967,7 +23015,7 @@ VIRTIO CORE AND NET DRIVERS
|
|||
M: "Michael S. Tsirkin" <mst@redhat.com>
|
||||
M: Jason Wang <jasowang@redhat.com>
|
||||
R: Xuan Zhuo <xuanzhuo@linux.alibaba.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: Documentation/ABI/testing/sysfs-bus-vdpa
|
||||
F: Documentation/ABI/testing/sysfs-class-vduse
|
||||
|
|
@ -22986,7 +23034,7 @@ F: tools/virtio/
|
|||
|
||||
VIRTIO CRYPTO DRIVER
|
||||
M: Gonglei <arei.gonglei@huawei.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: linux-crypto@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/crypto/virtio/
|
||||
|
|
@ -22997,7 +23045,7 @@ M: Cornelia Huck <cohuck@redhat.com>
|
|||
M: Halil Pasic <pasic@linux.ibm.com>
|
||||
M: Eric Farman <farman@linux.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: kvm@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/s390/include/uapi/asm/virtio-ccw.h
|
||||
|
|
@ -23007,7 +23055,7 @@ VIRTIO FILE SYSTEM
|
|||
M: Vivek Goyal <vgoyal@redhat.com>
|
||||
M: Stefan Hajnoczi <stefanha@redhat.com>
|
||||
M: Miklos Szeredi <miklos@szeredi.hu>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
S: Supported
|
||||
W: https://virtio-fs.gitlab.io/
|
||||
|
|
@ -23019,7 +23067,7 @@ VIRTIO GPIO DRIVER
|
|||
M: Enrico Weigelt, metux IT consult <info@metux.net>
|
||||
M: Viresh Kumar <vireshk@kernel.org>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-virtio.c
|
||||
F: include/uapi/linux/virtio_gpio.h
|
||||
|
|
@ -23030,7 +23078,7 @@ M: Gerd Hoffmann <kraxel@redhat.com>
|
|||
R: Gurchetan Singh <gurchetansingh@chromium.org>
|
||||
R: Chia-I Wu <olvaffe@gmail.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
F: drivers/gpu/drm/ci/xfails/virtio*
|
||||
|
|
@ -23041,7 +23089,7 @@ VIRTIO HOST (VHOST)
|
|||
M: "Michael S. Tsirkin" <mst@redhat.com>
|
||||
M: Jason Wang <jasowang@redhat.com>
|
||||
L: kvm@vger.kernel.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git
|
||||
|
|
@ -23057,7 +23105,7 @@ M: Jason Wang <jasowang@redhat.com>
|
|||
M: Mike Christie <michael.christie@oracle.com>
|
||||
R: Paolo Bonzini <pbonzini@redhat.com>
|
||||
R: Stefan Hajnoczi <stefanha@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/vhost/scsi.c
|
||||
|
||||
|
|
@ -23065,7 +23113,7 @@ VIRTIO I2C DRIVER
|
|||
M: Conghui Chen <conghui.chen@intel.com>
|
||||
M: Viresh Kumar <viresh.kumar@linaro.org>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/i2c/busses/i2c-virtio.c
|
||||
F: include/uapi/linux/virtio_i2c.h
|
||||
|
|
@ -23078,14 +23126,14 @@ F: include/uapi/linux/virtio_input.h
|
|||
|
||||
VIRTIO IOMMU DRIVER
|
||||
M: Jean-Philippe Brucker <jean-philippe@linaro.org>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/iommu/virtio-iommu.c
|
||||
F: include/uapi/linux/virtio_iommu.h
|
||||
|
||||
VIRTIO MEM DRIVER
|
||||
M: David Hildenbrand <david@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
W: https://virtio-mem.gitlab.io/
|
||||
F: drivers/virtio/virtio_mem.c
|
||||
|
|
@ -23093,7 +23141,7 @@ F: include/uapi/linux/virtio_mem.h
|
|||
|
||||
VIRTIO PMEM DRIVER
|
||||
M: Pankaj Gupta <pankaj.gupta.linux@gmail.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
S: Maintained
|
||||
F: drivers/nvdimm/nd_virtio.c
|
||||
F: drivers/nvdimm/virtio_pmem.c
|
||||
|
|
@ -23101,7 +23149,7 @@ F: drivers/nvdimm/virtio_pmem.c
|
|||
VIRTIO SOUND DRIVER
|
||||
M: Anton Yakovlev <anton.yakovlev@opensynergy.com>
|
||||
M: "Michael S. Tsirkin" <mst@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: include/uapi/linux/virtio_snd.h
|
||||
|
|
@ -23150,16 +23198,9 @@ W: https://linuxtv.org
|
|||
T: git git://linuxtv.org/media_tree.git
|
||||
F: drivers/media/test-drivers/vivid/*
|
||||
|
||||
VLYNQ BUS
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: openwrt-devel@lists.openwrt.org (subscribers-only)
|
||||
S: Maintained
|
||||
F: drivers/vlynq/vlynq.c
|
||||
F: include/linux/vlynq.h
|
||||
|
||||
VM SOCKETS (AF_VSOCK)
|
||||
M: Stefano Garzarella <sgarzare@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/vsockmon.c
|
||||
|
|
@ -23203,7 +23244,7 @@ VMWARE HYPERVISOR INTERFACE
|
|||
M: Ajay Kaher <akaher@vmware.com>
|
||||
M: Alexey Makhalov <amakhalov@vmware.com>
|
||||
R: VMware PV-Drivers Reviewers <pv-drivers@vmware.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: virtualization@lists.linux.dev
|
||||
L: x86@kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/vmware
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,8 +1,8 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 6
|
||||
PATCHLEVEL = 7
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION =
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -32,9 +32,6 @@ struct kprobe;
|
|||
|
||||
void arch_remove_kprobe(struct kprobe *p);
|
||||
|
||||
int kprobe_exceptions_notify(struct notifier_block *self,
|
||||
unsigned long val, void *data);
|
||||
|
||||
struct prev_kprobe {
|
||||
struct kprobe *kp;
|
||||
unsigned long status;
|
||||
|
|
|
|||
|
|
@ -1076,7 +1076,6 @@ CONFIG_QCOM_IPCC=y
|
|||
CONFIG_OMAP_IOMMU=y
|
||||
CONFIG_OMAP_IOMMU_DEBUG=y
|
||||
CONFIG_ROCKCHIP_IOMMU=y
|
||||
CONFIG_TEGRA_IOMMU_GART=y
|
||||
CONFIG_TEGRA_IOMMU_SMMU=y
|
||||
CONFIG_EXYNOS_IOMMU=y
|
||||
CONFIG_QCOM_IOMMU=y
|
||||
|
|
|
|||
|
|
@ -477,7 +477,6 @@ CONFIG_LIRC=y
|
|||
CONFIG_RC_DEVICES=y
|
||||
CONFIG_IR_GPIO_TX=m
|
||||
CONFIG_IR_PWM_TX=m
|
||||
CONFIG_IR_RX51=m
|
||||
CONFIG_IR_SPI=m
|
||||
CONFIG_MEDIA_SUPPORT=m
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
|
|
|
|||
|
|
@ -100,7 +100,6 @@ CONFIG_DEVTMPFS=y
|
|||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_CONNECTOR=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_AR7_PARTS=m
|
||||
CONFIG_MTD_CMDLINE_PARTS=m
|
||||
CONFIG_MTD_OF_PARTS=m
|
||||
CONFIG_MTD_AFS_PARTS=m
|
||||
|
|
|
|||
|
|
@ -292,7 +292,6 @@ CONFIG_CHROME_PLATFORMS=y
|
|||
CONFIG_CROS_EC=y
|
||||
CONFIG_CROS_EC_I2C=m
|
||||
CONFIG_CROS_EC_SPI=m
|
||||
CONFIG_TEGRA_IOMMU_GART=y
|
||||
CONFIG_TEGRA_IOMMU_SMMU=y
|
||||
CONFIG_ARCH_TEGRA_2x_SOC=y
|
||||
CONFIG_ARCH_TEGRA_3x_SOC=y
|
||||
|
|
|
|||
|
|
@ -23,6 +23,8 @@
|
|||
#define PMUSERENR __ACCESS_CP15(c9, 0, c14, 0)
|
||||
#define PMINTENSET __ACCESS_CP15(c9, 0, c14, 1)
|
||||
#define PMINTENCLR __ACCESS_CP15(c9, 0, c14, 2)
|
||||
#define PMCEID2 __ACCESS_CP15(c9, 0, c14, 4)
|
||||
#define PMCEID3 __ACCESS_CP15(c9, 0, c14, 5)
|
||||
#define PMMIR __ACCESS_CP15(c9, 0, c14, 6)
|
||||
#define PMCCFILTR __ACCESS_CP15(c14, 0, c15, 7)
|
||||
|
||||
|
|
@ -150,21 +152,6 @@ static inline u64 read_pmccntr(void)
|
|||
return read_sysreg(PMCCNTR);
|
||||
}
|
||||
|
||||
static inline void write_pmxevcntr(u32 val)
|
||||
{
|
||||
write_sysreg(val, PMXEVCNTR);
|
||||
}
|
||||
|
||||
static inline u32 read_pmxevcntr(void)
|
||||
{
|
||||
return read_sysreg(PMXEVCNTR);
|
||||
}
|
||||
|
||||
static inline void write_pmxevtyper(u32 val)
|
||||
{
|
||||
write_sysreg(val, PMXEVTYPER);
|
||||
}
|
||||
|
||||
static inline void write_pmcntenset(u32 val)
|
||||
{
|
||||
write_sysreg(val, PMCNTENSET);
|
||||
|
|
@ -205,16 +192,6 @@ static inline void write_pmuserenr(u32 val)
|
|||
write_sysreg(val, PMUSERENR);
|
||||
}
|
||||
|
||||
static inline u32 read_pmceid0(void)
|
||||
{
|
||||
return read_sysreg(PMCEID0);
|
||||
}
|
||||
|
||||
static inline u32 read_pmceid1(void)
|
||||
{
|
||||
return read_sysreg(PMCEID1);
|
||||
}
|
||||
|
||||
static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {}
|
||||
static inline void kvm_clr_pmu_events(u32 clr) {}
|
||||
static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr)
|
||||
|
|
@ -231,6 +208,7 @@ static inline void kvm_vcpu_pmu_resync_el0(void) {}
|
|||
|
||||
/* PMU Version in DFR Register */
|
||||
#define ARMV8_PMU_DFR_VER_NI 0
|
||||
#define ARMV8_PMU_DFR_VER_V3P1 0x4
|
||||
#define ARMV8_PMU_DFR_VER_V3P4 0x5
|
||||
#define ARMV8_PMU_DFR_VER_V3P5 0x6
|
||||
#define ARMV8_PMU_DFR_VER_IMP_DEF 0xF
|
||||
|
|
@ -251,4 +229,24 @@ static inline bool is_pmuv3p5(int pmuver)
|
|||
return pmuver >= ARMV8_PMU_DFR_VER_V3P5;
|
||||
}
|
||||
|
||||
static inline u64 read_pmceid0(void)
|
||||
{
|
||||
u64 val = read_sysreg(PMCEID0);
|
||||
|
||||
if (read_pmuver() >= ARMV8_PMU_DFR_VER_V3P1)
|
||||
val |= (u64)read_sysreg(PMCEID2) << 32;
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static inline u64 read_pmceid1(void)
|
||||
{
|
||||
u64 val = read_sysreg(PMCEID1);
|
||||
|
||||
if (read_pmuver() >= ARMV8_PMU_DFR_VER_V3P1)
|
||||
val |= (u64)read_sysreg(PMCEID3) << 32;
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -40,8 +40,6 @@ struct kprobe_ctlblk {
|
|||
|
||||
void arch_remove_kprobe(struct kprobe *);
|
||||
int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
|
||||
int kprobe_exceptions_notify(struct notifier_block *self,
|
||||
unsigned long val, void *data);
|
||||
|
||||
/* optinsn template addresses */
|
||||
extern __visible kprobe_opcode_t optprobe_template_entry[];
|
||||
|
|
|
|||
|
|
@ -859,7 +859,7 @@ &scp {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&scp_pins>;
|
||||
|
||||
cros_ec {
|
||||
cros-ec-rpmsg {
|
||||
compatible = "google,cros-ec-rpmsg";
|
||||
mediatek,rpmsg-name = "cros-ec-rpmsg";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1312,7 +1312,7 @@ &scp {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&scp_pins>;
|
||||
|
||||
cros-ec {
|
||||
cros-ec-rpmsg {
|
||||
compatible = "google,cros-ec-rpmsg";
|
||||
mediatek,rpmsg-name = "cros-ec-rpmsg";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -46,12 +46,12 @@ static inline u32 read_pmuver(void)
|
|||
ID_AA64DFR0_EL1_PMUVer_SHIFT);
|
||||
}
|
||||
|
||||
static inline void write_pmcr(u32 val)
|
||||
static inline void write_pmcr(u64 val)
|
||||
{
|
||||
write_sysreg(val, pmcr_el0);
|
||||
}
|
||||
|
||||
static inline u32 read_pmcr(void)
|
||||
static inline u64 read_pmcr(void)
|
||||
{
|
||||
return read_sysreg(pmcr_el0);
|
||||
}
|
||||
|
|
@ -71,21 +71,6 @@ static inline u64 read_pmccntr(void)
|
|||
return read_sysreg(pmccntr_el0);
|
||||
}
|
||||
|
||||
static inline void write_pmxevcntr(u32 val)
|
||||
{
|
||||
write_sysreg(val, pmxevcntr_el0);
|
||||
}
|
||||
|
||||
static inline u32 read_pmxevcntr(void)
|
||||
{
|
||||
return read_sysreg(pmxevcntr_el0);
|
||||
}
|
||||
|
||||
static inline void write_pmxevtyper(u32 val)
|
||||
{
|
||||
write_sysreg(val, pmxevtyper_el0);
|
||||
}
|
||||
|
||||
static inline void write_pmcntenset(u32 val)
|
||||
{
|
||||
write_sysreg(val, pmcntenset_el0);
|
||||
|
|
@ -106,7 +91,7 @@ static inline void write_pmintenclr(u32 val)
|
|||
write_sysreg(val, pmintenclr_el1);
|
||||
}
|
||||
|
||||
static inline void write_pmccfiltr(u32 val)
|
||||
static inline void write_pmccfiltr(u64 val)
|
||||
{
|
||||
write_sysreg(val, pmccfiltr_el0);
|
||||
}
|
||||
|
|
@ -126,12 +111,12 @@ static inline void write_pmuserenr(u32 val)
|
|||
write_sysreg(val, pmuserenr_el0);
|
||||
}
|
||||
|
||||
static inline u32 read_pmceid0(void)
|
||||
static inline u64 read_pmceid0(void)
|
||||
{
|
||||
return read_sysreg(pmceid0_el0);
|
||||
}
|
||||
|
||||
static inline u32 read_pmceid1(void)
|
||||
static inline u64 read_pmceid1(void)
|
||||
{
|
||||
return read_sysreg(pmceid1_el0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,8 +37,6 @@ struct kprobe_ctlblk {
|
|||
|
||||
void arch_remove_kprobe(struct kprobe *);
|
||||
int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
|
||||
int kprobe_exceptions_notify(struct notifier_block *self,
|
||||
unsigned long val, void *data);
|
||||
void __kretprobe_trampoline(void);
|
||||
void __kprobes *trampoline_probe_handler(struct pt_regs *regs);
|
||||
|
||||
|
|
|
|||
|
|
@ -54,7 +54,6 @@
|
|||
ALLOW_ERROR_INJECTION(__arm64_sys##name, ERRNO); \
|
||||
static long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \
|
||||
static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \
|
||||
asmlinkage long __arm64_sys##name(const struct pt_regs *regs); \
|
||||
asmlinkage long __arm64_sys##name(const struct pt_regs *regs) \
|
||||
{ \
|
||||
return __se_sys##name(SC_ARM64_REGS_TO_ARGS(x,__VA_ARGS__)); \
|
||||
|
|
|
|||
|
|
@ -999,6 +999,37 @@ static void init_32bit_cpu_features(struct cpuinfo_32bit *info)
|
|||
init_cpu_ftr_reg(SYS_MVFR2_EL1, info->reg_mvfr2);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARM64_PSEUDO_NMI
|
||||
static bool enable_pseudo_nmi;
|
||||
|
||||
static int __init early_enable_pseudo_nmi(char *p)
|
||||
{
|
||||
return kstrtobool(p, &enable_pseudo_nmi);
|
||||
}
|
||||
early_param("irqchip.gicv3_pseudo_nmi", early_enable_pseudo_nmi);
|
||||
|
||||
static __init void detect_system_supports_pseudo_nmi(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
if (!enable_pseudo_nmi)
|
||||
return;
|
||||
|
||||
/*
|
||||
* Detect broken MediaTek firmware that doesn't properly save and
|
||||
* restore GIC priorities.
|
||||
*/
|
||||
np = of_find_compatible_node(NULL, NULL, "arm,gic-v3");
|
||||
if (np && of_property_read_bool(np, "mediatek,broken-save-restore-fw")) {
|
||||
pr_info("Pseudo-NMI disabled due to MediaTek Chromebook GICR save problem\n");
|
||||
enable_pseudo_nmi = false;
|
||||
}
|
||||
of_node_put(np);
|
||||
}
|
||||
#else /* CONFIG_ARM64_PSEUDO_NMI */
|
||||
static inline void detect_system_supports_pseudo_nmi(void) { }
|
||||
#endif
|
||||
|
||||
void __init init_cpu_features(struct cpuinfo_arm64 *info)
|
||||
{
|
||||
/* Before we start using the tables, make sure it is sorted */
|
||||
|
|
@ -1057,6 +1088,13 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info)
|
|||
*/
|
||||
init_cpucap_indirect_list();
|
||||
|
||||
/*
|
||||
* Detect broken pseudo-NMI. Must be called _before_ the call to
|
||||
* setup_boot_cpu_capabilities() since it interacts with
|
||||
* can_use_gic_priorities().
|
||||
*/
|
||||
detect_system_supports_pseudo_nmi();
|
||||
|
||||
/*
|
||||
* Detect and enable early CPU capabilities based on the boot CPU,
|
||||
* after we have initialised the CPU feature infrastructure.
|
||||
|
|
@ -2085,14 +2123,6 @@ static void cpu_enable_e0pd(struct arm64_cpu_capabilities const *cap)
|
|||
#endif /* CONFIG_ARM64_E0PD */
|
||||
|
||||
#ifdef CONFIG_ARM64_PSEUDO_NMI
|
||||
static bool enable_pseudo_nmi;
|
||||
|
||||
static int __init early_enable_pseudo_nmi(char *p)
|
||||
{
|
||||
return kstrtobool(p, &enable_pseudo_nmi);
|
||||
}
|
||||
early_param("irqchip.gicv3_pseudo_nmi", early_enable_pseudo_nmi);
|
||||
|
||||
static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry,
|
||||
int scope)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -965,10 +965,7 @@ static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
|
|||
|
||||
static bool ipi_should_be_nmi(enum ipi_msg_type ipi)
|
||||
{
|
||||
DECLARE_STATIC_KEY_FALSE(supports_pseudo_nmis);
|
||||
|
||||
if (!system_uses_irq_prio_masking() ||
|
||||
!static_branch_likely(&supports_pseudo_nmis))
|
||||
if (!system_uses_irq_prio_masking())
|
||||
return false;
|
||||
|
||||
switch (ipi) {
|
||||
|
|
|
|||
|
|
@ -136,6 +136,7 @@ config LOONGARCH
|
|||
select HAVE_PERF_EVENTS
|
||||
select HAVE_PERF_REGS
|
||||
select HAVE_PERF_USER_STACK_DUMP
|
||||
select HAVE_PREEMPT_DYNAMIC_KEY
|
||||
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||
select HAVE_RETHOOK
|
||||
select HAVE_RSEQ
|
||||
|
|
|
|||
|
|
@ -68,6 +68,8 @@ LDFLAGS_vmlinux += -static -n -nostdlib
|
|||
ifdef CONFIG_AS_HAS_EXPLICIT_RELOCS
|
||||
cflags-y += $(call cc-option,-mexplicit-relocs)
|
||||
KBUILD_CFLAGS_KERNEL += $(call cc-option,-mdirect-extern-access)
|
||||
KBUILD_AFLAGS_MODULE += $(call cc-option,-fno-direct-access-external-data)
|
||||
KBUILD_CFLAGS_MODULE += $(call cc-option,-fno-direct-access-external-data)
|
||||
KBUILD_AFLAGS_MODULE += $(call cc-option,-mno-relax) $(call cc-option,-Wa$(comma)-mno-relax)
|
||||
KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax) $(call cc-option,-Wa$(comma)-mno-relax)
|
||||
else
|
||||
|
|
|
|||
|
|
@ -36,19 +36,19 @@
|
|||
static inline void arch_atomic_##op(int i, atomic_t *v) \
|
||||
{ \
|
||||
__asm__ __volatile__( \
|
||||
"am"#asm_op"_db.w" " $zero, %1, %0 \n" \
|
||||
"am"#asm_op".w" " $zero, %1, %0 \n" \
|
||||
: "+ZB" (v->counter) \
|
||||
: "r" (I) \
|
||||
: "memory"); \
|
||||
}
|
||||
|
||||
#define ATOMIC_OP_RETURN(op, I, asm_op, c_op) \
|
||||
static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \
|
||||
#define ATOMIC_OP_RETURN(op, I, asm_op, c_op, mb, suffix) \
|
||||
static inline int arch_atomic_##op##_return##suffix(int i, atomic_t *v) \
|
||||
{ \
|
||||
int result; \
|
||||
\
|
||||
__asm__ __volatile__( \
|
||||
"am"#asm_op"_db.w" " %1, %2, %0 \n" \
|
||||
"am"#asm_op#mb".w" " %1, %2, %0 \n" \
|
||||
: "+ZB" (v->counter), "=&r" (result) \
|
||||
: "r" (I) \
|
||||
: "memory"); \
|
||||
|
|
@ -56,13 +56,13 @@ static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \
|
|||
return result c_op I; \
|
||||
}
|
||||
|
||||
#define ATOMIC_FETCH_OP(op, I, asm_op) \
|
||||
static inline int arch_atomic_fetch_##op##_relaxed(int i, atomic_t *v) \
|
||||
#define ATOMIC_FETCH_OP(op, I, asm_op, mb, suffix) \
|
||||
static inline int arch_atomic_fetch_##op##suffix(int i, atomic_t *v) \
|
||||
{ \
|
||||
int result; \
|
||||
\
|
||||
__asm__ __volatile__( \
|
||||
"am"#asm_op"_db.w" " %1, %2, %0 \n" \
|
||||
"am"#asm_op#mb".w" " %1, %2, %0 \n" \
|
||||
: "+ZB" (v->counter), "=&r" (result) \
|
||||
: "r" (I) \
|
||||
: "memory"); \
|
||||
|
|
@ -72,29 +72,53 @@ static inline int arch_atomic_fetch_##op##_relaxed(int i, atomic_t *v) \
|
|||
|
||||
#define ATOMIC_OPS(op, I, asm_op, c_op) \
|
||||
ATOMIC_OP(op, I, asm_op) \
|
||||
ATOMIC_OP_RETURN(op, I, asm_op, c_op) \
|
||||
ATOMIC_FETCH_OP(op, I, asm_op)
|
||||
ATOMIC_OP_RETURN(op, I, asm_op, c_op, _db, ) \
|
||||
ATOMIC_OP_RETURN(op, I, asm_op, c_op, , _relaxed) \
|
||||
ATOMIC_FETCH_OP(op, I, asm_op, _db, ) \
|
||||
ATOMIC_FETCH_OP(op, I, asm_op, , _relaxed)
|
||||
|
||||
ATOMIC_OPS(add, i, add, +)
|
||||
ATOMIC_OPS(sub, -i, add, +)
|
||||
|
||||
#define arch_atomic_add_return arch_atomic_add_return
|
||||
#define arch_atomic_add_return_acquire arch_atomic_add_return
|
||||
#define arch_atomic_add_return_release arch_atomic_add_return
|
||||
#define arch_atomic_add_return_relaxed arch_atomic_add_return_relaxed
|
||||
#define arch_atomic_sub_return arch_atomic_sub_return
|
||||
#define arch_atomic_sub_return_acquire arch_atomic_sub_return
|
||||
#define arch_atomic_sub_return_release arch_atomic_sub_return
|
||||
#define arch_atomic_sub_return_relaxed arch_atomic_sub_return_relaxed
|
||||
#define arch_atomic_fetch_add arch_atomic_fetch_add
|
||||
#define arch_atomic_fetch_add_acquire arch_atomic_fetch_add
|
||||
#define arch_atomic_fetch_add_release arch_atomic_fetch_add
|
||||
#define arch_atomic_fetch_add_relaxed arch_atomic_fetch_add_relaxed
|
||||
#define arch_atomic_fetch_sub arch_atomic_fetch_sub
|
||||
#define arch_atomic_fetch_sub_acquire arch_atomic_fetch_sub
|
||||
#define arch_atomic_fetch_sub_release arch_atomic_fetch_sub
|
||||
#define arch_atomic_fetch_sub_relaxed arch_atomic_fetch_sub_relaxed
|
||||
|
||||
#undef ATOMIC_OPS
|
||||
|
||||
#define ATOMIC_OPS(op, I, asm_op) \
|
||||
ATOMIC_OP(op, I, asm_op) \
|
||||
ATOMIC_FETCH_OP(op, I, asm_op)
|
||||
ATOMIC_FETCH_OP(op, I, asm_op, _db, ) \
|
||||
ATOMIC_FETCH_OP(op, I, asm_op, , _relaxed)
|
||||
|
||||
ATOMIC_OPS(and, i, and)
|
||||
ATOMIC_OPS(or, i, or)
|
||||
ATOMIC_OPS(xor, i, xor)
|
||||
|
||||
#define arch_atomic_fetch_and arch_atomic_fetch_and
|
||||
#define arch_atomic_fetch_and_acquire arch_atomic_fetch_and
|
||||
#define arch_atomic_fetch_and_release arch_atomic_fetch_and
|
||||
#define arch_atomic_fetch_and_relaxed arch_atomic_fetch_and_relaxed
|
||||
#define arch_atomic_fetch_or arch_atomic_fetch_or
|
||||
#define arch_atomic_fetch_or_acquire arch_atomic_fetch_or
|
||||
#define arch_atomic_fetch_or_release arch_atomic_fetch_or
|
||||
#define arch_atomic_fetch_or_relaxed arch_atomic_fetch_or_relaxed
|
||||
#define arch_atomic_fetch_xor arch_atomic_fetch_xor
|
||||
#define arch_atomic_fetch_xor_acquire arch_atomic_fetch_xor
|
||||
#define arch_atomic_fetch_xor_release arch_atomic_fetch_xor
|
||||
#define arch_atomic_fetch_xor_relaxed arch_atomic_fetch_xor_relaxed
|
||||
|
||||
#undef ATOMIC_OPS
|
||||
|
|
@ -172,18 +196,18 @@ static inline int arch_atomic_sub_if_positive(int i, atomic_t *v)
|
|||
static inline void arch_atomic64_##op(long i, atomic64_t *v) \
|
||||
{ \
|
||||
__asm__ __volatile__( \
|
||||
"am"#asm_op"_db.d " " $zero, %1, %0 \n" \
|
||||
"am"#asm_op".d " " $zero, %1, %0 \n" \
|
||||
: "+ZB" (v->counter) \
|
||||
: "r" (I) \
|
||||
: "memory"); \
|
||||
}
|
||||
|
||||
#define ATOMIC64_OP_RETURN(op, I, asm_op, c_op) \
|
||||
static inline long arch_atomic64_##op##_return_relaxed(long i, atomic64_t *v) \
|
||||
#define ATOMIC64_OP_RETURN(op, I, asm_op, c_op, mb, suffix) \
|
||||
static inline long arch_atomic64_##op##_return##suffix(long i, atomic64_t *v) \
|
||||
{ \
|
||||
long result; \
|
||||
__asm__ __volatile__( \
|
||||
"am"#asm_op"_db.d " " %1, %2, %0 \n" \
|
||||
"am"#asm_op#mb".d " " %1, %2, %0 \n" \
|
||||
: "+ZB" (v->counter), "=&r" (result) \
|
||||
: "r" (I) \
|
||||
: "memory"); \
|
||||
|
|
@ -191,13 +215,13 @@ static inline long arch_atomic64_##op##_return_relaxed(long i, atomic64_t *v) \
|
|||
return result c_op I; \
|
||||
}
|
||||
|
||||
#define ATOMIC64_FETCH_OP(op, I, asm_op) \
|
||||
static inline long arch_atomic64_fetch_##op##_relaxed(long i, atomic64_t *v) \
|
||||
#define ATOMIC64_FETCH_OP(op, I, asm_op, mb, suffix) \
|
||||
static inline long arch_atomic64_fetch_##op##suffix(long i, atomic64_t *v) \
|
||||
{ \
|
||||
long result; \
|
||||
\
|
||||
__asm__ __volatile__( \
|
||||
"am"#asm_op"_db.d " " %1, %2, %0 \n" \
|
||||
"am"#asm_op#mb".d " " %1, %2, %0 \n" \
|
||||
: "+ZB" (v->counter), "=&r" (result) \
|
||||
: "r" (I) \
|
||||
: "memory"); \
|
||||
|
|
@ -207,29 +231,53 @@ static inline long arch_atomic64_fetch_##op##_relaxed(long i, atomic64_t *v) \
|
|||
|
||||
#define ATOMIC64_OPS(op, I, asm_op, c_op) \
|
||||
ATOMIC64_OP(op, I, asm_op) \
|
||||
ATOMIC64_OP_RETURN(op, I, asm_op, c_op) \
|
||||
ATOMIC64_FETCH_OP(op, I, asm_op)
|
||||
ATOMIC64_OP_RETURN(op, I, asm_op, c_op, _db, ) \
|
||||
ATOMIC64_OP_RETURN(op, I, asm_op, c_op, , _relaxed) \
|
||||
ATOMIC64_FETCH_OP(op, I, asm_op, _db, ) \
|
||||
ATOMIC64_FETCH_OP(op, I, asm_op, , _relaxed)
|
||||
|
||||
ATOMIC64_OPS(add, i, add, +)
|
||||
ATOMIC64_OPS(sub, -i, add, +)
|
||||
|
||||
#define arch_atomic64_add_return arch_atomic64_add_return
|
||||
#define arch_atomic64_add_return_acquire arch_atomic64_add_return
|
||||
#define arch_atomic64_add_return_release arch_atomic64_add_return
|
||||
#define arch_atomic64_add_return_relaxed arch_atomic64_add_return_relaxed
|
||||
#define arch_atomic64_sub_return arch_atomic64_sub_return
|
||||
#define arch_atomic64_sub_return_acquire arch_atomic64_sub_return
|
||||
#define arch_atomic64_sub_return_release arch_atomic64_sub_return
|
||||
#define arch_atomic64_sub_return_relaxed arch_atomic64_sub_return_relaxed
|
||||
#define arch_atomic64_fetch_add arch_atomic64_fetch_add
|
||||
#define arch_atomic64_fetch_add_acquire arch_atomic64_fetch_add
|
||||
#define arch_atomic64_fetch_add_release arch_atomic64_fetch_add
|
||||
#define arch_atomic64_fetch_add_relaxed arch_atomic64_fetch_add_relaxed
|
||||
#define arch_atomic64_fetch_sub arch_atomic64_fetch_sub
|
||||
#define arch_atomic64_fetch_sub_acquire arch_atomic64_fetch_sub
|
||||
#define arch_atomic64_fetch_sub_release arch_atomic64_fetch_sub
|
||||
#define arch_atomic64_fetch_sub_relaxed arch_atomic64_fetch_sub_relaxed
|
||||
|
||||
#undef ATOMIC64_OPS
|
||||
|
||||
#define ATOMIC64_OPS(op, I, asm_op) \
|
||||
ATOMIC64_OP(op, I, asm_op) \
|
||||
ATOMIC64_FETCH_OP(op, I, asm_op)
|
||||
ATOMIC64_FETCH_OP(op, I, asm_op, _db, ) \
|
||||
ATOMIC64_FETCH_OP(op, I, asm_op, , _relaxed)
|
||||
|
||||
ATOMIC64_OPS(and, i, and)
|
||||
ATOMIC64_OPS(or, i, or)
|
||||
ATOMIC64_OPS(xor, i, xor)
|
||||
|
||||
#define arch_atomic64_fetch_and arch_atomic64_fetch_and
|
||||
#define arch_atomic64_fetch_and_acquire arch_atomic64_fetch_and
|
||||
#define arch_atomic64_fetch_and_release arch_atomic64_fetch_and
|
||||
#define arch_atomic64_fetch_and_relaxed arch_atomic64_fetch_and_relaxed
|
||||
#define arch_atomic64_fetch_or arch_atomic64_fetch_or
|
||||
#define arch_atomic64_fetch_or_acquire arch_atomic64_fetch_or
|
||||
#define arch_atomic64_fetch_or_release arch_atomic64_fetch_or
|
||||
#define arch_atomic64_fetch_or_relaxed arch_atomic64_fetch_or_relaxed
|
||||
#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor
|
||||
#define arch_atomic64_fetch_xor_acquire arch_atomic64_fetch_xor
|
||||
#define arch_atomic64_fetch_xor_release arch_atomic64_fetch_xor
|
||||
#define arch_atomic64_fetch_xor_relaxed arch_atomic64_fetch_xor_relaxed
|
||||
|
||||
#undef ATOMIC64_OPS
|
||||
|
|
|
|||
|
|
@ -65,6 +65,8 @@ enum reg2_op {
|
|||
revbd_op = 0x0f,
|
||||
revh2w_op = 0x10,
|
||||
revhd_op = 0x11,
|
||||
extwh_op = 0x16,
|
||||
extwb_op = 0x17,
|
||||
iocsrrdb_op = 0x19200,
|
||||
iocsrrdh_op = 0x19201,
|
||||
iocsrrdw_op = 0x19202,
|
||||
|
|
@ -572,6 +574,8 @@ static inline void emit_##NAME(union loongarch_instruction *insn, \
|
|||
DEF_EMIT_REG2_FORMAT(revb2h, revb2h_op)
|
||||
DEF_EMIT_REG2_FORMAT(revb2w, revb2w_op)
|
||||
DEF_EMIT_REG2_FORMAT(revbd, revbd_op)
|
||||
DEF_EMIT_REG2_FORMAT(extwh, extwh_op)
|
||||
DEF_EMIT_REG2_FORMAT(extwb, extwb_op)
|
||||
|
||||
#define DEF_EMIT_REG2I5_FORMAT(NAME, OP) \
|
||||
static inline void emit_##NAME(union loongarch_instruction *insn, \
|
||||
|
|
@ -623,6 +627,9 @@ DEF_EMIT_REG2I12_FORMAT(lu52id, lu52id_op)
|
|||
DEF_EMIT_REG2I12_FORMAT(andi, andi_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(ori, ori_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(xori, xori_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(ldb, ldb_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(ldh, ldh_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(ldw, ldw_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(ldbu, ldbu_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(ldhu, ldhu_op)
|
||||
DEF_EMIT_REG2I12_FORMAT(ldwu, ldwu_op)
|
||||
|
|
@ -701,9 +708,12 @@ static inline void emit_##NAME(union loongarch_instruction *insn, \
|
|||
insn->reg3_format.rk = rk; \
|
||||
}
|
||||
|
||||
DEF_EMIT_REG3_FORMAT(addw, addw_op)
|
||||
DEF_EMIT_REG3_FORMAT(addd, addd_op)
|
||||
DEF_EMIT_REG3_FORMAT(subd, subd_op)
|
||||
DEF_EMIT_REG3_FORMAT(muld, muld_op)
|
||||
DEF_EMIT_REG3_FORMAT(divd, divd_op)
|
||||
DEF_EMIT_REG3_FORMAT(modd, modd_op)
|
||||
DEF_EMIT_REG3_FORMAT(divdu, divdu_op)
|
||||
DEF_EMIT_REG3_FORMAT(moddu, moddu_op)
|
||||
DEF_EMIT_REG3_FORMAT(and, and_op)
|
||||
|
|
@ -715,6 +725,9 @@ DEF_EMIT_REG3_FORMAT(srlw, srlw_op)
|
|||
DEF_EMIT_REG3_FORMAT(srld, srld_op)
|
||||
DEF_EMIT_REG3_FORMAT(sraw, sraw_op)
|
||||
DEF_EMIT_REG3_FORMAT(srad, srad_op)
|
||||
DEF_EMIT_REG3_FORMAT(ldxb, ldxb_op)
|
||||
DEF_EMIT_REG3_FORMAT(ldxh, ldxh_op)
|
||||
DEF_EMIT_REG3_FORMAT(ldxw, ldxw_op)
|
||||
DEF_EMIT_REG3_FORMAT(ldxbu, ldxbu_op)
|
||||
DEF_EMIT_REG3_FORMAT(ldxhu, ldxhu_op)
|
||||
DEF_EMIT_REG3_FORMAT(ldxwu, ldxwu_op)
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ static inline void set_my_cpu_offset(unsigned long off)
|
|||
#define __my_cpu_offset __my_cpu_offset
|
||||
|
||||
#define PERCPU_OP(op, asm_op, c_op) \
|
||||
static inline unsigned long __percpu_##op(void *ptr, \
|
||||
static __always_inline unsigned long __percpu_##op(void *ptr, \
|
||||
unsigned long val, int size) \
|
||||
{ \
|
||||
unsigned long ret; \
|
||||
|
|
@ -63,7 +63,7 @@ PERCPU_OP(and, and, &)
|
|||
PERCPU_OP(or, or, |)
|
||||
#undef PERCPU_OP
|
||||
|
||||
static inline unsigned long __percpu_read(void *ptr, int size)
|
||||
static __always_inline unsigned long __percpu_read(void *ptr, int size)
|
||||
{
|
||||
unsigned long ret;
|
||||
|
||||
|
|
@ -100,7 +100,7 @@ static inline unsigned long __percpu_read(void *ptr, int size)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static inline void __percpu_write(void *ptr, unsigned long val, int size)
|
||||
static __always_inline void __percpu_write(void *ptr, unsigned long val, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
|
|
@ -132,8 +132,8 @@ static inline void __percpu_write(void *ptr, unsigned long val, int size)
|
|||
}
|
||||
}
|
||||
|
||||
static inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
|
||||
int size)
|
||||
static __always_inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
|
||||
int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
|
|
|
|||
|
|
@ -504,8 +504,9 @@ asmlinkage void start_secondary(void)
|
|||
unsigned int cpu;
|
||||
|
||||
sync_counter();
|
||||
cpu = smp_processor_id();
|
||||
cpu = raw_smp_processor_id();
|
||||
set_my_cpu_offset(per_cpu_offset(cpu));
|
||||
rcutree_report_cpu_starting(cpu);
|
||||
|
||||
cpu_probe();
|
||||
constant_clockevent_init();
|
||||
|
|
|
|||
|
|
@ -411,7 +411,11 @@ static int add_exception_handler(const struct bpf_insn *insn,
|
|||
off_t offset;
|
||||
struct exception_table_entry *ex;
|
||||
|
||||
if (!ctx->image || !ctx->prog->aux->extable || BPF_MODE(insn->code) != BPF_PROBE_MEM)
|
||||
if (!ctx->image || !ctx->prog->aux->extable)
|
||||
return 0;
|
||||
|
||||
if (BPF_MODE(insn->code) != BPF_PROBE_MEM &&
|
||||
BPF_MODE(insn->code) != BPF_PROBE_MEMSX)
|
||||
return 0;
|
||||
|
||||
if (WARN_ON_ONCE(ctx->num_exentries >= ctx->prog->aux->num_exentries))
|
||||
|
|
@ -450,7 +454,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
|||
{
|
||||
u8 tm = -1;
|
||||
u64 func_addr;
|
||||
bool func_addr_fixed;
|
||||
bool func_addr_fixed, sign_extend;
|
||||
int i = insn - ctx->prog->insnsi;
|
||||
int ret, jmp_offset;
|
||||
const u8 code = insn->code;
|
||||
|
|
@ -468,8 +472,23 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
|||
/* dst = src */
|
||||
case BPF_ALU | BPF_MOV | BPF_X:
|
||||
case BPF_ALU64 | BPF_MOV | BPF_X:
|
||||
move_reg(ctx, dst, src);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
switch (off) {
|
||||
case 0:
|
||||
move_reg(ctx, dst, src);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
break;
|
||||
case 8:
|
||||
move_reg(ctx, t1, src);
|
||||
emit_insn(ctx, extwb, dst, t1);
|
||||
break;
|
||||
case 16:
|
||||
move_reg(ctx, t1, src);
|
||||
emit_insn(ctx, extwh, dst, t1);
|
||||
break;
|
||||
case 32:
|
||||
emit_insn(ctx, addw, dst, src, LOONGARCH_GPR_ZERO);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
/* dst = imm */
|
||||
|
|
@ -534,39 +553,71 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
|||
/* dst = dst / src */
|
||||
case BPF_ALU | BPF_DIV | BPF_X:
|
||||
case BPF_ALU64 | BPF_DIV | BPF_X:
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
move_reg(ctx, t1, src);
|
||||
emit_zext_32(ctx, t1, is32);
|
||||
emit_insn(ctx, divdu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
if (!off) {
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
move_reg(ctx, t1, src);
|
||||
emit_zext_32(ctx, t1, is32);
|
||||
emit_insn(ctx, divdu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
} else {
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
move_reg(ctx, t1, src);
|
||||
emit_sext_32(ctx, t1, is32);
|
||||
emit_insn(ctx, divd, dst, dst, t1);
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
}
|
||||
break;
|
||||
|
||||
/* dst = dst / imm */
|
||||
case BPF_ALU | BPF_DIV | BPF_K:
|
||||
case BPF_ALU64 | BPF_DIV | BPF_K:
|
||||
move_imm(ctx, t1, imm, is32);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
emit_insn(ctx, divdu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
if (!off) {
|
||||
move_imm(ctx, t1, imm, is32);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
emit_insn(ctx, divdu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
} else {
|
||||
move_imm(ctx, t1, imm, false);
|
||||
emit_sext_32(ctx, t1, is32);
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
emit_insn(ctx, divd, dst, dst, t1);
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
}
|
||||
break;
|
||||
|
||||
/* dst = dst % src */
|
||||
case BPF_ALU | BPF_MOD | BPF_X:
|
||||
case BPF_ALU64 | BPF_MOD | BPF_X:
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
move_reg(ctx, t1, src);
|
||||
emit_zext_32(ctx, t1, is32);
|
||||
emit_insn(ctx, moddu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
if (!off) {
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
move_reg(ctx, t1, src);
|
||||
emit_zext_32(ctx, t1, is32);
|
||||
emit_insn(ctx, moddu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
} else {
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
move_reg(ctx, t1, src);
|
||||
emit_sext_32(ctx, t1, is32);
|
||||
emit_insn(ctx, modd, dst, dst, t1);
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
}
|
||||
break;
|
||||
|
||||
/* dst = dst % imm */
|
||||
case BPF_ALU | BPF_MOD | BPF_K:
|
||||
case BPF_ALU64 | BPF_MOD | BPF_K:
|
||||
move_imm(ctx, t1, imm, is32);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
emit_insn(ctx, moddu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
if (!off) {
|
||||
move_imm(ctx, t1, imm, is32);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
emit_insn(ctx, moddu, dst, dst, t1);
|
||||
emit_zext_32(ctx, dst, is32);
|
||||
} else {
|
||||
move_imm(ctx, t1, imm, false);
|
||||
emit_sext_32(ctx, t1, is32);
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
emit_insn(ctx, modd, dst, dst, t1);
|
||||
emit_sext_32(ctx, dst, is32);
|
||||
}
|
||||
break;
|
||||
|
||||
/* dst = -dst */
|
||||
|
|
@ -712,6 +763,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
|||
break;
|
||||
|
||||
case BPF_ALU | BPF_END | BPF_FROM_BE:
|
||||
case BPF_ALU64 | BPF_END | BPF_FROM_LE:
|
||||
switch (imm) {
|
||||
case 16:
|
||||
emit_insn(ctx, revb2h, dst, dst);
|
||||
|
|
@ -828,7 +880,11 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
|||
|
||||
/* PC += off */
|
||||
case BPF_JMP | BPF_JA:
|
||||
jmp_offset = bpf2la_offset(i, off, ctx);
|
||||
case BPF_JMP32 | BPF_JA:
|
||||
if (BPF_CLASS(code) == BPF_JMP)
|
||||
jmp_offset = bpf2la_offset(i, off, ctx);
|
||||
else
|
||||
jmp_offset = bpf2la_offset(i, imm, ctx);
|
||||
if (emit_uncond_jmp(ctx, jmp_offset) < 0)
|
||||
goto toofar;
|
||||
break;
|
||||
|
|
@ -879,31 +935,56 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
|||
case BPF_LDX | BPF_PROBE_MEM | BPF_W:
|
||||
case BPF_LDX | BPF_PROBE_MEM | BPF_H:
|
||||
case BPF_LDX | BPF_PROBE_MEM | BPF_B:
|
||||
/* dst_reg = (s64)*(signed size *)(src_reg + off) */
|
||||
case BPF_LDX | BPF_MEMSX | BPF_B:
|
||||
case BPF_LDX | BPF_MEMSX | BPF_H:
|
||||
case BPF_LDX | BPF_MEMSX | BPF_W:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:
|
||||
sign_extend = BPF_MODE(insn->code) == BPF_MEMSX ||
|
||||
BPF_MODE(insn->code) == BPF_PROBE_MEMSX;
|
||||
switch (BPF_SIZE(code)) {
|
||||
case BPF_B:
|
||||
if (is_signed_imm12(off)) {
|
||||
emit_insn(ctx, ldbu, dst, src, off);
|
||||
if (sign_extend)
|
||||
emit_insn(ctx, ldb, dst, src, off);
|
||||
else
|
||||
emit_insn(ctx, ldbu, dst, src, off);
|
||||
} else {
|
||||
move_imm(ctx, t1, off, is32);
|
||||
emit_insn(ctx, ldxbu, dst, src, t1);
|
||||
if (sign_extend)
|
||||
emit_insn(ctx, ldxb, dst, src, t1);
|
||||
else
|
||||
emit_insn(ctx, ldxbu, dst, src, t1);
|
||||
}
|
||||
break;
|
||||
case BPF_H:
|
||||
if (is_signed_imm12(off)) {
|
||||
emit_insn(ctx, ldhu, dst, src, off);
|
||||
if (sign_extend)
|
||||
emit_insn(ctx, ldh, dst, src, off);
|
||||
else
|
||||
emit_insn(ctx, ldhu, dst, src, off);
|
||||
} else {
|
||||
move_imm(ctx, t1, off, is32);
|
||||
emit_insn(ctx, ldxhu, dst, src, t1);
|
||||
if (sign_extend)
|
||||
emit_insn(ctx, ldxh, dst, src, t1);
|
||||
else
|
||||
emit_insn(ctx, ldxhu, dst, src, t1);
|
||||
}
|
||||
break;
|
||||
case BPF_W:
|
||||
if (is_signed_imm12(off)) {
|
||||
emit_insn(ctx, ldwu, dst, src, off);
|
||||
} else if (is_signed_imm14(off)) {
|
||||
emit_insn(ctx, ldptrw, dst, src, off);
|
||||
if (sign_extend)
|
||||
emit_insn(ctx, ldw, dst, src, off);
|
||||
else
|
||||
emit_insn(ctx, ldwu, dst, src, off);
|
||||
} else {
|
||||
move_imm(ctx, t1, off, is32);
|
||||
emit_insn(ctx, ldxwu, dst, src, t1);
|
||||
if (sign_extend)
|
||||
emit_insn(ctx, ldxw, dst, src, t1);
|
||||
else
|
||||
emit_insn(ctx, ldxwu, dst, src, t1);
|
||||
}
|
||||
break;
|
||||
case BPF_DW:
|
||||
|
|
|
|||
|
|
@ -2,7 +2,6 @@
|
|||
# All platforms listed in alphabetic order
|
||||
|
||||
platform-$(CONFIG_MIPS_ALCHEMY) += alchemy/
|
||||
platform-$(CONFIG_AR7) += ar7/
|
||||
platform-$(CONFIG_ATH25) += ath25/
|
||||
platform-$(CONFIG_ATH79) += ath79/
|
||||
platform-$(CONFIG_BCM47XX) += bcm47xx/
|
||||
|
|
|
|||
|
|
@ -202,28 +202,6 @@ config MIPS_ALCHEMY
|
|||
select SYS_SUPPORTS_ZBOOT
|
||||
select COMMON_CLK
|
||||
|
||||
config AR7
|
||||
bool "Texas Instruments AR7"
|
||||
select BOOT_ELF32
|
||||
select COMMON_CLK
|
||||
select DMA_NONCOHERENT
|
||||
select CEVT_R4K
|
||||
select CSRC_R4K
|
||||
select IRQ_MIPS_CPU
|
||||
select NO_EXCEPT_FILL
|
||||
select SWAP_IO_SPACE
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select SYS_SUPPORTS_MIPS16
|
||||
select SYS_SUPPORTS_ZBOOT_UART16550
|
||||
select GPIOLIB
|
||||
select VLYNQ
|
||||
help
|
||||
Support for the Texas Instruments AR7 System-on-a-Chip
|
||||
family: TNETD7100, 7200 and 7300.
|
||||
|
||||
config ATH25
|
||||
bool "Atheros AR231x/AR531x SoC support"
|
||||
select CEVT_R4K
|
||||
|
|
|
|||
|
|
@ -1,11 +0,0 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
obj-y := \
|
||||
prom.o \
|
||||
setup.o \
|
||||
memory.o \
|
||||
irq.o \
|
||||
time.o \
|
||||
platform.o \
|
||||
gpio.o \
|
||||
clock.o
|
||||
|
|
@ -1,5 +0,0 @@
|
|||
#
|
||||
# Texas Instruments AR7
|
||||
#
|
||||
cflags-$(CONFIG_AR7) += -I$(srctree)/arch/mips/include/asm/mach-ar7
|
||||
load-$(CONFIG_AR7) += 0xffffffff94100000
|
||||
|
|
@ -1,439 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
|
||||
* Copyright (C) 2007 Eugene Konev <ejka@openwrt.org>
|
||||
* Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gcd.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clkdev.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/clk-provider.h>
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/mach-ar7/ar7.h>
|
||||
|
||||
#define BOOT_PLL_SOURCE_MASK 0x3
|
||||
#define CPU_PLL_SOURCE_SHIFT 16
|
||||
#define BUS_PLL_SOURCE_SHIFT 14
|
||||
#define USB_PLL_SOURCE_SHIFT 18
|
||||
#define DSP_PLL_SOURCE_SHIFT 22
|
||||
#define BOOT_PLL_SOURCE_AFE 0
|
||||
#define BOOT_PLL_SOURCE_BUS 0
|
||||
#define BOOT_PLL_SOURCE_REF 1
|
||||
#define BOOT_PLL_SOURCE_XTAL 2
|
||||
#define BOOT_PLL_SOURCE_CPU 3
|
||||
#define BOOT_PLL_BYPASS 0x00000020
|
||||
#define BOOT_PLL_ASYNC_MODE 0x02000000
|
||||
#define BOOT_PLL_2TO1_MODE 0x00008000
|
||||
|
||||
#define TNETD7200_CLOCK_ID_CPU 0
|
||||
#define TNETD7200_CLOCK_ID_DSP 1
|
||||
#define TNETD7200_CLOCK_ID_USB 2
|
||||
|
||||
#define TNETD7200_DEF_CPU_CLK 211000000
|
||||
#define TNETD7200_DEF_DSP_CLK 125000000
|
||||
#define TNETD7200_DEF_USB_CLK 48000000
|
||||
|
||||
struct tnetd7300_clock {
|
||||
u32 ctrl;
|
||||
#define PREDIV_MASK 0x001f0000
|
||||
#define PREDIV_SHIFT 16
|
||||
#define POSTDIV_MASK 0x0000001f
|
||||
u32 unused1[3];
|
||||
u32 pll;
|
||||
#define MUL_MASK 0x0000f000
|
||||
#define MUL_SHIFT 12
|
||||
#define PLL_MODE_MASK 0x00000001
|
||||
#define PLL_NDIV 0x00000800
|
||||
#define PLL_DIV 0x00000002
|
||||
#define PLL_STATUS 0x00000001
|
||||
u32 unused2[3];
|
||||
};
|
||||
|
||||
struct tnetd7300_clocks {
|
||||
struct tnetd7300_clock bus;
|
||||
struct tnetd7300_clock cpu;
|
||||
struct tnetd7300_clock usb;
|
||||
struct tnetd7300_clock dsp;
|
||||
};
|
||||
|
||||
struct tnetd7200_clock {
|
||||
u32 ctrl;
|
||||
u32 unused1[3];
|
||||
#define DIVISOR_ENABLE_MASK 0x00008000
|
||||
u32 mul;
|
||||
u32 prediv;
|
||||
u32 postdiv;
|
||||
u32 postdiv2;
|
||||
u32 unused2[6];
|
||||
u32 cmd;
|
||||
u32 status;
|
||||
u32 cmden;
|
||||
u32 padding[15];
|
||||
};
|
||||
|
||||
struct tnetd7200_clocks {
|
||||
struct tnetd7200_clock cpu;
|
||||
struct tnetd7200_clock dsp;
|
||||
struct tnetd7200_clock usb;
|
||||
};
|
||||
|
||||
struct clk_rate {
|
||||
u32 rate;
|
||||
};
|
||||
static struct clk_rate bus_clk = {
|
||||
.rate = 125000000,
|
||||
};
|
||||
|
||||
static struct clk_rate cpu_clk = {
|
||||
.rate = 150000000,
|
||||
};
|
||||
|
||||
static void approximate(int base, int target, int *prediv,
|
||||
int *postdiv, int *mul)
|
||||
{
|
||||
int i, j, k, freq, res = target;
|
||||
for (i = 1; i <= 16; i++)
|
||||
for (j = 1; j <= 32; j++)
|
||||
for (k = 1; k <= 32; k++) {
|
||||
freq = abs(base / j * i / k - target);
|
||||
if (freq < res) {
|
||||
res = freq;
|
||||
*mul = i;
|
||||
*prediv = j;
|
||||
*postdiv = k;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void calculate(int base, int target, int *prediv, int *postdiv,
|
||||
int *mul)
|
||||
{
|
||||
int tmp_gcd, tmp_base, tmp_freq;
|
||||
|
||||
for (*prediv = 1; *prediv <= 32; (*prediv)++) {
|
||||
tmp_base = base / *prediv;
|
||||
tmp_gcd = gcd(target, tmp_base);
|
||||
*mul = target / tmp_gcd;
|
||||
*postdiv = tmp_base / tmp_gcd;
|
||||
if ((*mul < 1) || (*mul >= 16))
|
||||
continue;
|
||||
if ((*postdiv > 0) & (*postdiv <= 32))
|
||||
break;
|
||||
}
|
||||
|
||||
if (base / *prediv * *mul / *postdiv != target) {
|
||||
approximate(base, target, prediv, postdiv, mul);
|
||||
tmp_freq = base / *prediv * *mul / *postdiv;
|
||||
printk(KERN_WARNING
|
||||
"Adjusted requested frequency %d to %d\n",
|
||||
target, tmp_freq);
|
||||
}
|
||||
|
||||
printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n",
|
||||
*prediv, *postdiv, *mul);
|
||||
}
|
||||
|
||||
static int tnetd7300_dsp_clock(void)
|
||||
{
|
||||
u32 didr1, didr2;
|
||||
u8 rev = ar7_chip_rev();
|
||||
didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18));
|
||||
didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c));
|
||||
if (didr2 & (1 << 23))
|
||||
return 0;
|
||||
if ((rev >= 0x23) && (rev != 0x57))
|
||||
return 250000000;
|
||||
if ((((didr2 & 0x1fff) << 10) | ((didr1 & 0xffc00000) >> 22))
|
||||
> 4208000)
|
||||
return 250000000;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
|
||||
u32 *bootcr, u32 bus_clock)
|
||||
{
|
||||
int product;
|
||||
int base_clock = AR7_REF_CLOCK;
|
||||
u32 ctrl = readl(&clock->ctrl);
|
||||
u32 pll = readl(&clock->pll);
|
||||
int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
|
||||
int postdiv = (ctrl & POSTDIV_MASK) + 1;
|
||||
int divisor = prediv * postdiv;
|
||||
int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1;
|
||||
|
||||
switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
|
||||
case BOOT_PLL_SOURCE_BUS:
|
||||
base_clock = bus_clock;
|
||||
break;
|
||||
case BOOT_PLL_SOURCE_REF:
|
||||
base_clock = AR7_REF_CLOCK;
|
||||
break;
|
||||
case BOOT_PLL_SOURCE_XTAL:
|
||||
base_clock = AR7_XTAL_CLOCK;
|
||||
break;
|
||||
case BOOT_PLL_SOURCE_CPU:
|
||||
base_clock = cpu_clk.rate;
|
||||
break;
|
||||
}
|
||||
|
||||
if (*bootcr & BOOT_PLL_BYPASS)
|
||||
return base_clock / divisor;
|
||||
|
||||
if ((pll & PLL_MODE_MASK) == 0)
|
||||
return (base_clock >> (mul / 16 + 1)) / divisor;
|
||||
|
||||
if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
|
||||
product = (mul & 1) ?
|
||||
(base_clock * mul) >> 1 :
|
||||
(base_clock * (mul - 1)) >> 2;
|
||||
return product / divisor;
|
||||
}
|
||||
|
||||
if (mul == 16)
|
||||
return base_clock / divisor;
|
||||
|
||||
return base_clock * mul / divisor;
|
||||
}
|
||||
|
||||
static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
|
||||
u32 *bootcr, u32 frequency)
|
||||
{
|
||||
int prediv, postdiv, mul;
|
||||
int base_clock = bus_clk.rate;
|
||||
|
||||
switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
|
||||
case BOOT_PLL_SOURCE_BUS:
|
||||
base_clock = bus_clk.rate;
|
||||
break;
|
||||
case BOOT_PLL_SOURCE_REF:
|
||||
base_clock = AR7_REF_CLOCK;
|
||||
break;
|
||||
case BOOT_PLL_SOURCE_XTAL:
|
||||
base_clock = AR7_XTAL_CLOCK;
|
||||
break;
|
||||
case BOOT_PLL_SOURCE_CPU:
|
||||
base_clock = cpu_clk.rate;
|
||||
break;
|
||||
}
|
||||
|
||||
calculate(base_clock, frequency, &prediv, &postdiv, &mul);
|
||||
|
||||
writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
|
||||
mdelay(1);
|
||||
writel(4, &clock->pll);
|
||||
while (readl(&clock->pll) & PLL_STATUS)
|
||||
;
|
||||
writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
|
||||
mdelay(75);
|
||||
}
|
||||
|
||||
static void __init tnetd7300_init_clocks(void)
|
||||
{
|
||||
u32 *bootcr = (u32 *)ioremap(AR7_REGS_DCL, 4);
|
||||
struct tnetd7300_clocks *clocks =
|
||||
ioremap(UR8_REGS_CLOCKS,
|
||||
sizeof(struct tnetd7300_clocks));
|
||||
u32 dsp_clk;
|
||||
struct clk *clk;
|
||||
|
||||
bus_clk.rate = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT,
|
||||
&clocks->bus, bootcr, AR7_AFE_CLOCK);
|
||||
|
||||
if (*bootcr & BOOT_PLL_ASYNC_MODE)
|
||||
cpu_clk.rate = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT,
|
||||
&clocks->cpu, bootcr, AR7_AFE_CLOCK);
|
||||
else
|
||||
cpu_clk.rate = bus_clk.rate;
|
||||
|
||||
dsp_clk = tnetd7300_dsp_clock();
|
||||
if (dsp_clk == 250000000)
|
||||
tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp,
|
||||
bootcr, dsp_clk);
|
||||
|
||||
iounmap(clocks);
|
||||
iounmap(bootcr);
|
||||
|
||||
clk = clk_register_fixed_rate(NULL, "cpu", NULL, 0, cpu_clk.rate);
|
||||
clkdev_create(clk, "cpu", NULL);
|
||||
clk = clk_register_fixed_rate(NULL, "dsp", NULL, 0, dsp_clk);
|
||||
clkdev_create(clk, "dsp", NULL);
|
||||
}
|
||||
|
||||
static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
|
||||
int prediv, int postdiv, int postdiv2, int mul, u32 frequency)
|
||||
{
|
||||
printk(KERN_INFO
|
||||
"Clocks: base = %d, frequency = %u, prediv = %d, "
|
||||
"postdiv = %d, postdiv2 = %d, mul = %d\n",
|
||||
base, frequency, prediv, postdiv, postdiv2, mul);
|
||||
|
||||
writel(0, &clock->ctrl);
|
||||
writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv);
|
||||
writel((mul - 1) & 0xF, &clock->mul);
|
||||
|
||||
while (readl(&clock->status) & 0x1)
|
||||
; /* nop */
|
||||
|
||||
writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv);
|
||||
|
||||
writel(readl(&clock->cmden) | 1, &clock->cmden);
|
||||
writel(readl(&clock->cmd) | 1, &clock->cmd);
|
||||
|
||||
while (readl(&clock->status) & 0x1)
|
||||
; /* nop */
|
||||
|
||||
writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2);
|
||||
|
||||
writel(readl(&clock->cmden) | 1, &clock->cmden);
|
||||
writel(readl(&clock->cmd) | 1, &clock->cmd);
|
||||
|
||||
while (readl(&clock->status) & 0x1)
|
||||
; /* nop */
|
||||
|
||||
writel(readl(&clock->ctrl) | 1, &clock->ctrl);
|
||||
}
|
||||
|
||||
static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
|
||||
{
|
||||
if (*bootcr & BOOT_PLL_ASYNC_MODE)
|
||||
/* Async */
|
||||
switch (clock_id) {
|
||||
case TNETD7200_CLOCK_ID_DSP:
|
||||
return AR7_REF_CLOCK;
|
||||
default:
|
||||
return AR7_AFE_CLOCK;
|
||||
}
|
||||
else
|
||||
/* Sync */
|
||||
if (*bootcr & BOOT_PLL_2TO1_MODE)
|
||||
/* 2:1 */
|
||||
switch (clock_id) {
|
||||
case TNETD7200_CLOCK_ID_DSP:
|
||||
return AR7_REF_CLOCK;
|
||||
default:
|
||||
return AR7_AFE_CLOCK;
|
||||
}
|
||||
else
|
||||
/* 1:1 */
|
||||
return AR7_REF_CLOCK;
|
||||
}
|
||||
|
||||
|
||||
static void __init tnetd7200_init_clocks(void)
|
||||
{
|
||||
u32 *bootcr = (u32 *)ioremap(AR7_REGS_DCL, 4);
|
||||
struct tnetd7200_clocks *clocks =
|
||||
ioremap(AR7_REGS_CLOCKS,
|
||||
sizeof(struct tnetd7200_clocks));
|
||||
int cpu_base, cpu_mul, cpu_prediv, cpu_postdiv;
|
||||
int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv;
|
||||
int usb_base, usb_mul, usb_prediv, usb_postdiv;
|
||||
struct clk *clk;
|
||||
|
||||
cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr);
|
||||
dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr);
|
||||
|
||||
if (*bootcr & BOOT_PLL_ASYNC_MODE) {
|
||||
printk(KERN_INFO "Clocks: Async mode\n");
|
||||
|
||||
printk(KERN_INFO "Clocks: Setting DSP clock\n");
|
||||
calculate(dsp_base, TNETD7200_DEF_DSP_CLK,
|
||||
&dsp_prediv, &dsp_postdiv, &dsp_mul);
|
||||
bus_clk.rate =
|
||||
((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv;
|
||||
tnetd7200_set_clock(dsp_base, &clocks->dsp,
|
||||
dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2,
|
||||
bus_clk.rate);
|
||||
|
||||
printk(KERN_INFO "Clocks: Setting CPU clock\n");
|
||||
calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv,
|
||||
&cpu_postdiv, &cpu_mul);
|
||||
cpu_clk.rate =
|
||||
((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv;
|
||||
tnetd7200_set_clock(cpu_base, &clocks->cpu,
|
||||
cpu_prediv, cpu_postdiv, -1, cpu_mul,
|
||||
cpu_clk.rate);
|
||||
|
||||
} else
|
||||
if (*bootcr & BOOT_PLL_2TO1_MODE) {
|
||||
printk(KERN_INFO "Clocks: Sync 2:1 mode\n");
|
||||
|
||||
printk(KERN_INFO "Clocks: Setting CPU clock\n");
|
||||
calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv,
|
||||
&cpu_postdiv, &cpu_mul);
|
||||
cpu_clk.rate = ((cpu_base / cpu_prediv) * cpu_mul)
|
||||
/ cpu_postdiv;
|
||||
tnetd7200_set_clock(cpu_base, &clocks->cpu,
|
||||
cpu_prediv, cpu_postdiv, -1, cpu_mul,
|
||||
cpu_clk.rate);
|
||||
|
||||
printk(KERN_INFO "Clocks: Setting DSP clock\n");
|
||||
calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
|
||||
&dsp_postdiv, &dsp_mul);
|
||||
bus_clk.rate = cpu_clk.rate / 2;
|
||||
tnetd7200_set_clock(dsp_base, &clocks->dsp,
|
||||
dsp_prediv, dsp_postdiv * 2, dsp_postdiv,
|
||||
dsp_mul * 2, bus_clk.rate);
|
||||
} else {
|
||||
printk(KERN_INFO "Clocks: Sync 1:1 mode\n");
|
||||
|
||||
printk(KERN_INFO "Clocks: Setting DSP clock\n");
|
||||
calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
|
||||
&dsp_postdiv, &dsp_mul);
|
||||
bus_clk.rate = ((dsp_base / dsp_prediv) * dsp_mul)
|
||||
/ dsp_postdiv;
|
||||
tnetd7200_set_clock(dsp_base, &clocks->dsp,
|
||||
dsp_prediv, dsp_postdiv * 2, dsp_postdiv,
|
||||
dsp_mul * 2, bus_clk.rate);
|
||||
|
||||
cpu_clk.rate = bus_clk.rate;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "Clocks: Setting USB clock\n");
|
||||
usb_base = bus_clk.rate;
|
||||
calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv,
|
||||
&usb_postdiv, &usb_mul);
|
||||
tnetd7200_set_clock(usb_base, &clocks->usb,
|
||||
usb_prediv, usb_postdiv, -1, usb_mul,
|
||||
TNETD7200_DEF_USB_CLK);
|
||||
|
||||
iounmap(clocks);
|
||||
iounmap(bootcr);
|
||||
|
||||
clk = clk_register_fixed_rate(NULL, "cpu", NULL, 0, cpu_clk.rate);
|
||||
clkdev_create(clk, "cpu", NULL);
|
||||
clkdev_create(clk, "dsp", NULL);
|
||||
}
|
||||
|
||||
void __init ar7_init_clocks(void)
|
||||
{
|
||||
struct clk *clk;
|
||||
|
||||
switch (ar7_chip_id()) {
|
||||
case AR7_CHIP_7100:
|
||||
case AR7_CHIP_7200:
|
||||
tnetd7200_init_clocks();
|
||||
break;
|
||||
case AR7_CHIP_7300:
|
||||
tnetd7300_init_clocks();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
clk = clk_register_fixed_rate(NULL, "bus", NULL, 0, bus_clk.rate);
|
||||
clkdev_create(clk, "bus", NULL);
|
||||
/* adjust vbus clock rate */
|
||||
clk = clk_register_fixed_factor(NULL, "vbus", "bus", 0, 1, 2);
|
||||
clkdev_create(clk, "vbus", NULL);
|
||||
clkdev_create(clk, "cpmac", "cpmac.1");
|
||||
clkdev_create(clk, "cpmac", "cpmac.1");
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user