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drm/amd/display: Make DCN35 OTG disable w/a reusable

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The logic for the OTG disable workaround is particularly complex and
should be leveraged going forward instead of reimplementing and
maintaining it for multiple ASIC.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nicholas Kazlauskas 2026-01-19 16:09:50 -05:00 committed by Alex Deucher
parent 9a42510d6b
commit 8488fb054e
2 changed files with 7 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
View File

@ -186,7 +186,7 @@ static int dcn35_get_active_display_cnt_wa(
return display_count;
}
static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,
void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,
bool safe_to_lower, bool disable)
{
struct dc *dc = clk_mgr_base->ctx->dc;

6
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h
View File

@ -64,4 +64,10 @@ void dcn351_clk_mgr_construct(struct dc_context *ctx,
struct clk_mgr_dcn35 *clk_mgr,
struct pp_smu_funcs *pp_smu,
struct dccg *dccg);
void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base,
struct dc_state *context,
bool safe_to_lower,
bool disable);
#endif //__DCN35_CLK_MGR_H__