riscv: dts: starfive: jh7110-common: Move out some nodes to the board dts

Some node in this file are not used by the upcoming VisionFive 2 Lite
board. Move them to the board dts to prepare for adding the new
VisionFive 2 Lite device tree.

Tested-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Hal Feng 2025-11-25 15:56:01 +08:00 committed by Conor Dooley
parent 7a1e15b248
commit 84853940a7
7 changed files with 63 additions and 8 deletions

View File

@ -281,14 +281,8 @@ &mmc0 {
assigned-clock-rates = <50000000>;
bus-width = <8>;
bootph-pre-ram;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
cap-mmc-hw-reset;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&emmc_vdd>;
status = "okay";
};
@ -298,8 +292,6 @@ &mmc1 {
assigned-clock-rates = <50000000>;
bus-width = <4>;
bootph-pre-ram;
cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
disable-wp;
cap-sd-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;

View File

@ -11,6 +11,15 @@ / {
compatible = "deepcomputing,fml13v01", "starfive,jh7110";
};
&mmc0 {
cap-mmc-highspeed;
cap-mmc-hw-reset;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&emmc_vdd>;
};
&mmc0_pins {
rst-pins {
pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
@ -24,6 +33,11 @@ GPOEN_ENABLE,
};
};
&mmc1 {
cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
disable-wp;
};
&pcie1 {
perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>;
phys = <&pciephy1>;

View File

@ -22,6 +22,15 @@ &i2c0 {
status = "okay";
};
&mmc0 {
cap-mmc-highspeed;
cap-mmc-hw-reset;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&emmc_vdd>;
};
&mmc0_pins {
rst-pins {
pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
@ -35,6 +44,11 @@ GPOEN_ENABLE,
};
};
&mmc1 {
cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
disable-wp;
};
&pcie0 {
status = "okay";
};

View File

@ -10,3 +10,12 @@ / {
model = "Milk-V Mars CM";
compatible = "milkv,marscm-emmc", "starfive,jh7110";
};
&mmc0 {
cap-mmc-highspeed;
cap-mmc-hw-reset;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&emmc_vdd>;
};

View File

@ -14,6 +14,7 @@ / {
&mmc0 {
bus-width = <4>;
cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
disable-wp;
};
&mmc0_pins {

View File

@ -44,6 +44,15 @@ &i2c0 {
status = "okay";
};
&mmc0 {
cap-mmc-highspeed;
cap-mmc-hw-reset;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&emmc_vdd>;
};
&mmc0_pins {
rst-pins {
pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
@ -57,6 +66,11 @@ GPOEN_ENABLE,
};
};
&mmc1 {
cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
disable-wp;
};
&pcie1 {
status = "okay";
};

View File

@ -38,6 +38,12 @@ &i2c0 {
};
&mmc0 {
cap-mmc-highspeed;
cap-mmc-hw-reset;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&emmc_vdd>;
non-removable;
};
@ -54,6 +60,11 @@ GPOEN_ENABLE,
};
};
&mmc1 {
cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
disable-wp;
};
&pcie0 {
status = "okay";
};