diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.c index 19df8b47248b..d3cc624cd758 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.c @@ -105,7 +105,7 @@ union dcn42_dpia_host_router_bw { static uint32_t dcn42_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) { - uint32_t res_val = DALSMC_Result_CmdRejectedBusy; + uint32_t res_val; do { res_val = REG_READ(DAL_RESP_REG); @@ -180,7 +180,7 @@ int dcn42_smu_get_pmfw_version(struct clk_mgr_internal *clk_mgr) int dcn42_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) { - int actual_dispclk_set_mhz = -1; + int actual_dispclk_set_mhz; if (!clk_mgr->smu_present) return requested_dispclk_khz; @@ -199,7 +199,7 @@ int dcn42_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispcl int dcn42_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) { - int actual_dcfclk_set_mhz = -1; + int actual_dcfclk_set_mhz; if (!clk_mgr->smu_present) return requested_dcfclk_khz; @@ -217,7 +217,7 @@ int dcn42_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requeste int dcn42_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz) { - int actual_min_ds_dcfclk_mhz = -1; + int actual_min_ds_dcfclk_mhz; if (!clk_mgr->smu_present) return requested_min_ds_dcfclk_khz; @@ -235,7 +235,7 @@ int dcn42_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int re int dcn42_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) { - int actual_dppclk_set_mhz = -1; + int actual_dppclk_set_mhz; if (!clk_mgr->smu_present) return requested_dpp_khz; diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c index 9f2f4d61d323..8e41367cf238 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c @@ -1811,8 +1811,8 @@ static bool dcn42_resource_construct( int i, j; struct dc_context *ctx = dc->ctx; struct irq_service_init_data init_data; - uint32_t pipe_fuses = 0; - uint32_t num_pipes = 4; + uint32_t pipe_fuses; + uint32_t num_pipes; #undef REG_STRUCT #define REG_STRUCT bios_regs