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pwm: tegra: Modify read/write accessors for multi-register channel

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On Tegra264, each PWM instance has two registers (per channel, of which
there is one). Update the tegra_pwm_readl/tegra_pwm_writel helper
functions to take channel (as struct pwm_device *) and offset
separately.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260701-t264-pwm-v6-4-2718f61f411f@nvidia.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
This commit is contained in:
Mikko Perttunen 2026-07-01 12:20:33 +09:00 committed by Uwe Kleine-König
parent d6bf1d39c3
commit 83a4cadc7a
1 changed files with 15 additions and 11 deletions
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26
drivers/pwm/pwm-tegra.c
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@ -57,6 +57,8 @@
#define TEGRA_PWM_SCALE_WIDTH 13
#define TEGRA_PWM_SCALE_SHIFT 0
#define TEGRA_PWM_CSR_0 0
struct tegra_pwm_soc {
unsigned int num_channels;
};
@ -78,14 +80,18 @@ static inline struct tegra_pwm_chip *to_tegra_pwm_chip(struct pwm_chip *chip)
return pwmchip_get_drvdata(chip);
}
static inline u32 tegra_pwm_readl(struct tegra_pwm_chip *pc, unsigned int offset)
static inline u32 tegra_pwm_readl(struct pwm_device *pwm, unsigned int offset)
{
return readl(pc->regs + (offset << 4));
struct tegra_pwm_chip *chip = to_tegra_pwm_chip(pwm->chip);
return readl(chip->regs + (pwm->hwpwm * 16) + offset);
}
static inline void tegra_pwm_writel(struct tegra_pwm_chip *pc, unsigned int offset, u32 value)
static inline void tegra_pwm_writel(struct pwm_device *pwm, unsigned int offset, u32 value)
{
writel(value, pc->regs + (offset << 4));
struct tegra_pwm_chip *chip = to_tegra_pwm_chip(pwm->chip);
writel(value, chip->regs + (pwm->hwpwm * 16) + offset);
}
static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
@ -194,7 +200,7 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
} else
val |= TEGRA_PWM_ENABLE;
tegra_pwm_writel(pc, pwm->hwpwm, val);
tegra_pwm_writel(pwm, TEGRA_PWM_CSR_0, val);
/*
* If the PWM is not enabled, turn the clock off again to save power.
@ -207,7 +213,6 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
static int tegra_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip);
int rc = 0;
u32 val;
@ -215,21 +220,20 @@ static int tegra_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
if (rc)
return rc;
val = tegra_pwm_readl(pc, pwm->hwpwm);
val = tegra_pwm_readl(pwm, TEGRA_PWM_CSR_0);
val |= TEGRA_PWM_ENABLE;
tegra_pwm_writel(pc, pwm->hwpwm, val);
tegra_pwm_writel(pwm, TEGRA_PWM_CSR_0, val);
return 0;
}
static void tegra_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip);
u32 val;
val = tegra_pwm_readl(pc, pwm->hwpwm);
val = tegra_pwm_readl(pwm, TEGRA_PWM_CSR_0);
val &= ~TEGRA_PWM_ENABLE;
tegra_pwm_writel(pc, pwm->hwpwm, val);
tegra_pwm_writel(pwm, TEGRA_PWM_CSR_0, val);
pm_runtime_put_sync(pwmchip_parent(chip));
}