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drm/amd/pm: Add dpm interface for temp metrics
Add dpm interface to get gpuboard/baseboard temperature metrics v2: Add temperature metrics support check(Lijo) v3: Return error code in case of operation not supported(Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -30,6 +30,12 @@ extern const struct amdgpu_ip_block_version smu_v12_0_ip_block;
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extern const struct amdgpu_ip_block_version smu_v13_0_ip_block;
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extern const struct amdgpu_ip_block_version smu_v14_0_ip_block;
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enum smu_temp_metric_type {
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SMU_TEMP_METRIC_BASEBOARD,
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SMU_TEMP_METRIC_GPUBOARD,
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SMU_TEMP_METRIC_MAX,
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};
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enum smu_event_type {
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SMU_EVENT_RESET_COMPLETE = 0,
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};
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@ -496,6 +502,8 @@ struct amd_pm_funcs {
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int (*set_df_cstate)(void *handle, enum pp_df_cstate state);
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int (*set_xgmi_pstate)(void *handle, uint32_t pstate);
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ssize_t (*get_gpu_metrics)(void *handle, void **table);
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ssize_t (*get_temp_metrics)(void *handle, enum smu_temp_metric_type type, void *table);
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bool (*temp_metrics_is_supported)(void *handle, enum smu_temp_metric_type type);
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ssize_t (*get_xcp_metrics)(void *handle, int xcp_id, void *table);
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ssize_t (*get_pm_metrics)(void *handle, void *pmmetrics, size_t size);
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int (*set_watermarks_for_clock_ranges)(void *handle,
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@ -1595,6 +1603,79 @@ struct amdgpu_pm_metrics {
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uint8_t data[];
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};
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enum amdgpu_vr_temp {
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AMDGPU_VDDCR_VDD0_TEMP,
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AMDGPU_VDDCR_VDD1_TEMP,
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AMDGPU_VDDCR_VDD2_TEMP,
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AMDGPU_VDDCR_VDD3_TEMP,
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AMDGPU_VDDCR_SOC_A_TEMP,
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AMDGPU_VDDCR_SOC_C_TEMP,
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AMDGPU_VDDCR_SOCIO_A_TEMP,
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AMDGPU_VDDCR_SOCIO_C_TEMP,
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AMDGPU_VDD_085_HBM_TEMP,
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AMDGPU_VDDCR_11_HBM_B_TEMP,
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AMDGPU_VDDCR_11_HBM_D_TEMP,
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AMDGPU_VDD_USR_TEMP,
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AMDGPU_VDDIO_11_E32_TEMP,
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AMDGPU_VR_MAX_TEMP_ENTRIES,
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};
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enum amdgpu_system_temp {
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AMDGPU_UBB_FPGA_TEMP,
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AMDGPU_UBB_FRONT_TEMP,
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AMDGPU_UBB_BACK_TEMP,
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AMDGPU_UBB_OAM7_TEMP,
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AMDGPU_UBB_IBC_TEMP,
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AMDGPU_UBB_UFPGA_TEMP,
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AMDGPU_UBB_OAM1_TEMP,
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AMDGPU_OAM_0_1_HSC_TEMP,
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AMDGPU_OAM_2_3_HSC_TEMP,
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AMDGPU_OAM_4_5_HSC_TEMP,
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AMDGPU_OAM_6_7_HSC_TEMP,
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AMDGPU_UBB_FPGA_0V72_VR_TEMP,
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AMDGPU_UBB_FPGA_3V3_VR_TEMP,
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AMDGPU_RETIMER_0_1_2_3_1V2_VR_TEMP,
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AMDGPU_RETIMER_4_5_6_7_1V2_VR_TEMP,
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AMDGPU_RETIMER_0_1_0V9_VR_TEMP,
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AMDGPU_RETIMER_4_5_0V9_VR_TEMP,
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AMDGPU_RETIMER_2_3_0V9_VR_TEMP,
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AMDGPU_RETIMER_6_7_0V9_VR_TEMP,
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AMDGPU_OAM_0_1_2_3_3V3_VR_TEMP,
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AMDGPU_OAM_4_5_6_7_3V3_VR_TEMP,
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AMDGPU_IBC_HSC_TEMP,
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AMDGPU_IBC_TEMP,
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AMDGPU_SYSTEM_MAX_TEMP_ENTRIES = 32,
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};
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enum amdgpu_node_temp {
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AMDGPU_RETIMER_X_TEMP,
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AMDGPU_OAM_X_IBC_TEMP,
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AMDGPU_OAM_X_IBC_2_TEMP,
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AMDGPU_OAM_X_VDD18_VR_TEMP,
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AMDGPU_OAM_X_04_HBM_B_VR_TEMP,
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AMDGPU_OAM_X_04_HBM_D_VR_TEMP,
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AMDGPU_NODE_MAX_TEMP_ENTRIES = 12,
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};
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struct amdgpu_gpuboard_temp_metrics_v1_0 {
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struct metrics_table_header common_header;
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uint16_t label_version;
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uint16_t node_id;
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uint64_t accumulation_counter;
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/* Encoded temperature in Celcius, 24:31 is sensor id 0:23 is temp value */
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uint32_t node_temp[AMDGPU_NODE_MAX_TEMP_ENTRIES];
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uint32_t vr_temp[AMDGPU_VR_MAX_TEMP_ENTRIES];
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};
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struct amdgpu_baseboard_temp_metrics_v1_0 {
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struct metrics_table_header common_header;
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uint16_t label_version;
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uint16_t node_id;
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uint64_t accumulation_counter;
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/* Encoded temperature in Celcius, 24:31 is sensor id 0:23 is temp value */
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uint32_t system_temp[AMDGPU_SYSTEM_MAX_TEMP_ENTRIES];
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};
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struct amdgpu_partition_metrics_v1_0 {
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struct metrics_table_header common_header;
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/* Current clocks (Mhz) */
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@ -2037,6 +2037,66 @@ int amdgpu_dpm_get_dpm_clock_table(struct amdgpu_device *adev,
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return ret;
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}
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/**
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* amdgpu_dpm_get_temp_metrics - Retrieve metrics for a specific compute
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* partition
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* @adev: Pointer to the device.
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* @type: Identifier for the temperature type metrics to be fetched.
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* @table: Pointer to a buffer where the metrics will be stored. If NULL, the
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* function returns the size of the metrics structure.
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*
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* This function retrieves metrics for a specific temperature type, If the
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* table parameter is NULL, the function returns the size of the metrics
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* structure without populating it.
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*
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* Return: Size of the metrics structure on success, or a negative error code on failure.
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*/
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ssize_t amdgpu_dpm_get_temp_metrics(struct amdgpu_device *adev,
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enum smu_temp_metric_type type, void *table)
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{
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const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
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int ret;
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if (!pp_funcs->get_temp_metrics ||
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!amdgpu_dpm_is_temp_metrics_supported(adev, type))
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return -EOPNOTSUPP;
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mutex_lock(&adev->pm.mutex);
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ret = pp_funcs->get_temp_metrics(adev->powerplay.pp_handle, type, table);
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mutex_unlock(&adev->pm.mutex);
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return ret;
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}
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/**
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* amdgpu_dpm_is_temp_metrics_supported - Return if specific temperature metrics support
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* is available
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* @adev: Pointer to the device.
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* @type: Identifier for the temperature type metrics to be fetched.
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*
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* This function returns metrics if specific temperature metrics type is supported or not.
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*
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* Return: True in case of metrics type supported else false.
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*/
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bool amdgpu_dpm_is_temp_metrics_supported(struct amdgpu_device *adev,
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enum smu_temp_metric_type type)
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{
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const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
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bool support_temp_metrics = false;
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if (!pp_funcs->temp_metrics_is_supported)
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return support_temp_metrics;
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if (is_support_sw_smu(adev)) {
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mutex_lock(&adev->pm.mutex);
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support_temp_metrics =
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pp_funcs->temp_metrics_is_supported(adev->powerplay.pp_handle, type);
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mutex_unlock(&adev->pm.mutex);
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}
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return support_temp_metrics;
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}
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/**
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* amdgpu_dpm_get_xcp_metrics - Retrieve metrics for a specific compute
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* partition
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@ -526,6 +526,8 @@ int amdgpu_dpm_set_power_profile_mode(struct amdgpu_device *adev,
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int amdgpu_dpm_get_gpu_metrics(struct amdgpu_device *adev, void **table);
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ssize_t amdgpu_dpm_get_xcp_metrics(struct amdgpu_device *adev, int xcp_id,
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void *table);
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ssize_t amdgpu_dpm_get_temp_metrics(struct amdgpu_device *adev,
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enum smu_temp_metric_type type, void *table);
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/**
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* @get_pm_metrics: Get one snapshot of power management metrics from PMFW. The
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@ -613,5 +615,7 @@ ssize_t amdgpu_dpm_get_pm_policy_info(struct amdgpu_device *adev,
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int amdgpu_dpm_reset_sdma(struct amdgpu_device *adev, uint32_t inst_mask);
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bool amdgpu_dpm_reset_sdma_is_supported(struct amdgpu_device *adev);
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int amdgpu_dpm_reset_vcn(struct amdgpu_device *adev, uint32_t inst_mask);
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bool amdgpu_dpm_is_temp_metrics_supported(struct amdgpu_device *adev,
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enum smu_temp_metric_type type);
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#endif
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