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arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V

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On the RZ/G2LC SMARC SOM, the RGMII interface between the SoC and the
Ethernet PHY operates at 1.8V.

The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-9-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Paul Barker 2024-06-25 21:03:15 +01:00 committed by Geert Uytterhoeven
parent 96a3f52570
commit 831d521927
1 changed files with 7 additions and 2 deletions
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9
arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
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@ -130,6 +130,7 @@ &pinctrl {
eth0_pins: eth0 {
txc {
pinmux = <RZG2L_PORT_PINMUX(20, 0, 1)>; /* ET0_TXC */
power-source = <1800>;
output-enable;
};
@ -147,8 +148,12 @@ mux {
<RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
<RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
<RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
<RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */
<RZG2L_PORT_PINMUX(0, 0, 1)>; /* IRQ0 */
<RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
power-source = <1800>;
};
irq {
pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>; /* IRQ0 */
};
};