dt-bindings: mfd: hisilicon,hi655x-pmic: Convert to DT schema

Convert the Hisilicon Hi655x PMIC binding from the text format to DT schema
to enable dtbs_check validation.

The 'regulators' child node is added based on existing usage in
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts, which defines child
regulator nodes not documented in the original .txt binding.

The uppercase LDO names are retained to match existing DTS usage.

Signed-off-by: Shaunak Datar <shaunakkdatar@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260423113237.260652-1-shaunakkdatar@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>

Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml

@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/hisilicon,hi655x-pmic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Hi655x Power Management Integrated Circuit
+
+maintainers:
+  - Chen Feng <puck.chen@hisilicon.com>
+  - Daniel Lezcano <daniel.lezcano@kernel.org>
+
+description:
+  The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
+  Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
+  We can use memory-mapped I/O to communicate.
+
+properties:
+  compatible:
+    const: hisilicon,hi655x-pmic
+
+  reg:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 2
+
+  pmic-gpios:
+    maxItems: 1
+    description: The GPIO used by PMIC IRQ
+
+  '#clock-cells':
+    const: 0
+
+  clock-output-names:
+    maxItems: 1
+
+  regulators:
+    type: object
+    additionalProperties: false
+
+    patternProperties:
+      '^LDO(2|7|10|13|14|15|17|19|21|22)$':
+        type: object
+        $ref: /schemas/regulator/regulator.yaml#
+        unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+  - pmic-gpios
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+
+    pmic: pmic@f8000000 {
+        compatible = "hisilicon,hi655x-pmic";
+        reg = <0xf8000000 0x1000>;
+        #clock-cells = <0>;
+        interrupt-controller;
+        #interrupt-cells = <2>;
+        pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+
+        regulators {
+            ldo2: LDO2 {
+                regulator-name = "LDO2_2V8";
+                regulator-min-microvolt = <2500000>;
+                regulator-max-microvolt = <3200000>;
+                regulator-enable-ramp-delay = <120>;
+            };
+        };
+    };

Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt

@@ -1,33 +0,0 @@
-Hisilicon Hi655x Power Management Integrated Circuit (PMIC)
-
-The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
-Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
-We can use memory-mapped I/O to communicate.
-
-+----------------+             +-------------+
-|                |             |             |
-|    Hi6220      |   SSI bus   |   Hi655x    |
-|                |-------------|             |
-|                |(REGMAP_MMIO)|             |
-+----------------+             +-------------+
-
-Required properties:
-- compatible:           Should be "hisilicon,hi655x-pmic".
-- reg:                  Base address of PMIC on Hi6220 SoC.
-- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
-- pmic-gpios:           The GPIO used by PMIC IRQ.
-- #clock-cells:		From common clock binding; shall be set to 0
-
-Optional properties:
-- clock-output-names: From common clock binding to override the
-  default output clock name
-
-Example:
-	pmic: pmic@f8000000 {
-		compatible = "hisilicon,hi655x-pmic";
-		reg = <0x0 0xf8000000 0x0 0x1000>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-		#clock-cells = <0>;
-	}