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drm/i915/flipq: Add intel_flipq_dump()

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Add a function for dumping the entries of a specific flip queue.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250624170049.27284-9-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2025-06-24 20:00:48 +03:00
parent a47828f3e7
commit 8245873637
2 changed files with 48 additions and 0 deletions
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46
drivers/gpu/drm/i915/display/intel_flipq.c
View File

@ -205,6 +205,52 @@ static int intel_flipq_exec_time_lines(const struct intel_crtc_state *crtc_state
intel_flipq_exec_time_us(display));
}
void intel_flipq_dump(struct intel_crtc *crtc,
enum intel_flipq_id flipq_id)
{
struct intel_display *display = to_intel_display(crtc);
struct intel_flipq *flipq = &crtc->flipq[flipq_id];
u32 tmp;
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] FQ %d @ 0x%x: ",
crtc->base.base.id, crtc->base.name, flipq_id,
flipq->start_mmioaddr);
for (int i = 0 ; i < intel_flipq_size_dw(flipq_id); i++) {
printk(KERN_CONT " 0x%08x",
intel_de_read(display, PIPEDMC_FQ_RAM(flipq->start_mmioaddr, i)));
if (i % intel_flipq_elem_size_dw(flipq_id) == intel_flipq_elem_size_dw(flipq_id) - 1)
printk(KERN_CONT "\n");
}
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] FQ %d: chp=0x%x, hp=0x%x\n",
crtc->base.base.id, crtc->base.name, flipq_id,
intel_de_read(display, PIPEDMC_FPQ_CHP(crtc->pipe, flipq_id)),
intel_de_read(display, PIPEDMC_FPQ_HP(crtc->pipe, flipq_id)));
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] FQ %d: current head %d\n",
crtc->base.base.id, crtc->base.name, flipq_id,
intel_flipq_current_head(crtc, flipq_id));
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] flip queue timestamp: 0x%x\n",
crtc->base.base.id, crtc->base.name,
intel_de_read(display, PIPEDMC_FPQ_TS(crtc->pipe)));
tmp = intel_de_read(display, PIPEDMC_FPQ_ATOMIC_TP(crtc->pipe));
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] flip queue atomic tails: P3 %d, P2 %d, P1 %d, G %d, F %d\n",
crtc->base.base.id, crtc->base.name,
REG_FIELD_GET(PIPEDMC_FPQ_PLANEQ_3_TP_MASK, tmp),
REG_FIELD_GET(PIPEDMC_FPQ_PLANEQ_2_TP_MASK, tmp),
REG_FIELD_GET(PIPEDMC_FPQ_PLANEQ_1_TP_MASK, tmp),
REG_FIELD_GET(PIPEDMC_FPQ_GENERALQ_TP_MASK, tmp),
REG_FIELD_GET(PIPEDMC_FPQ_FASTQ_TP_MASK, tmp));
}
void intel_flipq_reset(struct intel_display *display, enum pipe pipe)
{
struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

2
drivers/gpu/drm/i915/display/intel_flipq.h
View File

@ -31,5 +31,7 @@ void intel_flipq_add(struct intel_crtc *crtc,
int intel_flipq_exec_time_us(struct intel_display *display);
void intel_flipq_wait_dmc_halt(struct intel_dsb *dsb, struct intel_crtc *crtc);
void intel_flipq_unhalt_dmc(struct intel_dsb *dsb, struct intel_crtc *crtc);
void intel_flipq_dump(struct intel_crtc *crtc,
enum intel_flipq_id flip_queue_id);
#endif /* __INTEL_FLIPQ_H__ */