arm64: tegra: Drop redundant clock and reset names for TSEC

The DT bindings don't allow the clock and reset names to be specified
since there is only a single entry for each.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2026-02-23 15:33:05 +01:00
parent 51f10c527a
commit 8231b3dbd6

View File

@ -309,9 +309,7 @@ tsec@54500000 {
reg = <0x0 0x54500000 0x0 0x00040000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_TSECB>;
clock-names = "tsec";
resets = <&tegra_car 206>;
reset-names = "tsec";
status = "disabled";
};