usb: phy: Turn on PHY clks with phy_init() when EUD is enabled

msm_eusb2_phy_init() and msm_eusb2_phy_set_suspend() APIs are making
sure that all resources (i.e. clock/regulators/PHY register based
init/ deinit) required for PHY to operate being configured. Although
in EUD enable case PHY is not getting reset, and just clock and
regulators are turned on and off with USB cable connect and disconnect.

consider case: Perform USB cable disconnect/connect in HS/SS port with
EUD enable

In this case, there is situation where dwc3 core (child) is suspending
and resuming without dwc3 msm (parent) is being suspended. eUSB2 PHY
driver's set_suspend() is one which turn on PHY clocks which is being
called from dwc3 msm (parent) resume context. Currently eUSB2 PHY driver
is not turning on PHY clocks with msm_eusb2_phy_init() when EUD is
enable. This results into core soft reset failure as eUSB2 PHY clocks
are not ON as set_suspend(false) is not getting from dwc3 msm resume
context.

Below code path would invoke without dwc3 msm (parent) suspending and
resuming:

dwc3_suspend_common()
--> dwc3_core_exit()
--> usb_phy_set_suspend(TRUE)
--> PHY clocks and regulators are turned OFF

dwc3_resume_common()
--> dwc3_core_init()
--> phy_init()
... core soft reset -> failure is seen here
--> usb_phy_set_suspend(FALSE)

Fix this issue by turning on PHY clks from msm_eusb2_phy_init() when
EUD is enabled.

Change-Id: Ia0a77b6a5c17810d92e5811065a6e3efab6ccb6b
Signed-off-by: Mayank Rana <quic_mrana@quicinc.com>

drivers/usb/phy/phy-msm-snps-eusb2.c

@@ -682,6 +682,7 @@ static int msm_eusb2_phy_init(struct usb_phy *uphy)
 			phy->re_enable_eud = true;
 		} else {
 			msm_eusb2_phy_power(phy, true);
+			msm_eusb2_phy_clocks(phy, true);
 			return msm_eusb2_repeater_reset_and_init(phy);
 		}
 	}