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drm/i915: Remove zombie async flip vt-d w/a
This async flip vt-d w/a was moved to a different place in commit7d396cacae("drm/i195: Make the async flip VT-d workaround dynamic") but the drm-intel-fixes cherry-pick commitb2d73debfd("drm/i915: Extend the async flip VT-d w/a to skl/bxt") resurrected the original code as well. So now we have this w/a in two places. Remove the resurrected zombie code. Not done as a revert to hopefully prevent any kind of automagic stable backport. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211208150050.17230-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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@ -79,8 +79,6 @@ struct intel_wm_config {
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static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
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{
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enum pipe pipe;
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if (HAS_LLC(dev_priv)) {
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/*
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* WaCompressedResourceDisplayNewHashMode:skl,kbl
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@ -94,16 +92,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
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SKL_DE_COMPRESSED_HASH_MODE);
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}
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for_each_pipe(dev_priv, pipe) {
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/*
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* "Plane N strech max must be programmed to 11b (x1)
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* when Async flips are enabled on that plane."
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*/
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if (!IS_GEMINILAKE(dev_priv) && intel_vtd_active())
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intel_uncore_rmw(&dev_priv->uncore, CHICKEN_PIPESL_1(pipe),
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SKL_PLANE1_STRETCH_MAX_MASK, SKL_PLANE1_STRETCH_MAX_X1);
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}
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/* See Bspec note for PSR2_CTL bit 31, Wa#828:skl,bxt,kbl,cfl */
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intel_uncore_write(&dev_priv->uncore, CHICKEN_PAR1_1,
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intel_uncore_read(&dev_priv->uncore, CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP);
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