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RISC-V Misc Devicetrees for v6.17

Browse Source 
StarFive:
 Sort properties on the MilkV Mars and add the power status LED to all
 jh7110 boards.
 
 AMD:
 Add 64-bit Microblaze V cpu compatible.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Misc Devicetrees for v6.17

StarFive:
Sort properties on the MilkV Mars and add the power status LED to all
jh7110 boards.

AMD:
Add 64-bit Microblaze V cpu compatible.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  dt-bindings: riscv: cpus: Add AMD MicroBlaze V 64bit compatible
  riscv: dts: starfive: jh7110-common: add status power led node
  riscv: dts: starfive: jh7110-milkv-mars sort properties

Link: https://lore.kernel.org/r/20250723-postage-skylight-597377b5f8e4@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-07-23 22:23:26 +02:00
commit 8113e1dfbc
3 changed files with 16 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/riscv/cpus.yaml
View File

@ -45,6 +45,7 @@ properties:
- items:
- enum:
- amd,mbv32
- amd,mbv64
- andestech,ax45mp
- canaan,k210
- sifive,bullet0

9
arch/riscv/boot/dts/starfive/jh7110-common.dtsi
View File

@ -8,6 +8,7 @@
#include "jh7110.dtsi"
#include "jh7110-pinfunc.h"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
/ {
@ -38,6 +39,14 @@ gpio-restart {
priority = <224>;
};
leds {
compatible = "gpio-leds";
led_status_power: led-0 {
gpios = <&aongpio 3 GPIO_ACTIVE_HIGH>;
};
};
pwmdac_codec: audio-codec {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;

12
arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
View File

@ -12,9 +12,9 @@ / {
};
&gmac0 {
starfive,tx-use-rgmii-clk;
assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
starfive,tx-use-rgmii-clk;
status = "okay";
};
@ -31,14 +31,14 @@ &pcie1 {
};
&phy0 {
motorcomm,tx-clk-adj-enabled;
rx-internal-delay-ps = <1500>;
tx-internal-delay-ps = <1500>;
motorcomm,rx-clk-drv-microamp = <3970>;
motorcomm,rx-data-drv-microamp = <2910>;
motorcomm,tx-clk-10-inverted;
motorcomm,tx-clk-100-inverted;
motorcomm,tx-clk-1000-inverted;
motorcomm,rx-clk-drv-microamp = <3970>;
motorcomm,rx-data-drv-microamp = <2910>;
rx-internal-delay-ps = <1500>;
tx-internal-delay-ps = <1500>;
motorcomm,tx-clk-adj-enabled;
};
&pwm {