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drm/radeon/pm: update current crtc info after setting the powerstate
commit 5e031d9fe8 upstream.
On CI, we need to see if the number of crtcs changes to determine
whether or not we need to upload the mclk table again. In practice
we don't currently upload the mclk table again after the initial load.
The only reason you would would be to add new states, e.g., for
arbitrary mclk setting which is not currently supported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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parent
598fc9b7d7
commit
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@ -1076,10 +1076,6 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
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/* update display watermarks based on new power state */
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radeon_bandwidth_update(rdev);
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rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
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rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
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rdev->pm.dpm.single_display = single_display;
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/* wait for the rings to drain */
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for (i = 0; i < RADEON_NUM_RINGS; i++) {
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struct radeon_ring *ring = &rdev->ring[i];
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@ -1098,6 +1094,10 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
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/* update displays */
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radeon_dpm_display_configuration_changed(rdev);
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rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
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rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
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rdev->pm.dpm.single_display = single_display;
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if (rdev->asic->dpm.force_performance_level) {
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if (rdev->pm.dpm.thermal_active) {
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enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;
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