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dt-bindings: iio: adc: ad4080: add AD4880 support
Add support for the AD4880, a dual-channel 20-bit 40MSPS SAR ADC with integrated fully differential amplifiers (FDA). The AD4880 has two independent ADC channels, each with its own SPI configuration interface. This requires: - Two entries in reg property for primary and secondary channel chip selects - Two io-backends entries for the two data channels Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -18,7 +18,11 @@ description: |
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service a wide variety of precision, wide bandwidth data acquisition
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applications.
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The AD4880 is a dual-channel variant with two independent ADC channels,
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each with its own SPI configuration interface.
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad4880.pdf
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$ref: /schemas/spi/spi-peripheral-props.yaml#
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@ -34,9 +38,15 @@ properties:
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- adi,ad4086
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- adi,ad4087
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- adi,ad4088
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- adi,ad4880
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reg:
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maxItems: 1
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minItems: 1
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maxItems: 2
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description:
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SPI chip select(s). For single-channel devices, one chip select.
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For multi-channel devices like AD4880, two chip selects are required
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as each channel has its own SPI configuration interface.
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spi-max-frequency:
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description: Configuration of the SPI bus.
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@ -60,7 +70,10 @@ properties:
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vrefin-supply: true
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io-backends:
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maxItems: 1
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minItems: 1
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items:
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- description: Backend for channel A (primary)
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- description: Backend for channel B (secondary)
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adi,lvds-cnv-enable:
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description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
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@ -81,6 +94,25 @@ required:
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- vdd33-supply
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- vrefin-supply
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: adi,ad4880
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then:
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properties:
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reg:
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minItems: 2
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io-backends:
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minItems: 2
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else:
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properties:
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reg:
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maxItems: 1
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io-backends:
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maxItems: 1
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additionalProperties: false
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examples:
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@ -101,4 +133,21 @@ examples:
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io-backends = <&iio_backend>;
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};
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};
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad4880";
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reg = <0>, <1>;
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spi-max-frequency = <10000000>;
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vdd33-supply = <&vdd33>;
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vddldo-supply = <&vddldo>;
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vrefin-supply = <&vrefin>;
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clocks = <&cnv>;
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clock-names = "cnv";
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io-backends = <&iio_backend_cha>, <&iio_backend_chb>;
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};
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};
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...
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