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perf vendor events: Update SkylakeX events

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Update events from v1.36 to v1.37.

Bring in the event updates v1.37:
6ee8e4cadd

Signed-off-by: Ian Rogers <irogers@google.com>
Tested-by: Thomas Falcon <thomas.falcon@intel.com>
Link: https://lore.kernel.org/r/20250630163101.1920170-15-irogers@google.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
Ian Rogers 2025-06-30 09:30:59 -07:00 committed by Namhyung Kim
parent 336473ad07
commit 80c6b82226
2 changed files with 2 additions and 2 deletions
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2
tools/perf/pmu-events/arch/x86/mapfile.csv
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@ -33,7 +33,7 @@ GenuineIntel-6-8F,v1.28,sapphirerapids,core
GenuineIntel-6-AF,v1.11,sierraforest,core
GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core
GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v59,skylake,core
GenuineIntel-6-55-[01234],v1.36,skylakex,core
GenuineIntel-6-55-[01234],v1.37,skylakex,core
GenuineIntel-6-86,v1.23,snowridgex,core
GenuineIntel-6-8[CD],v1.17,tigerlake,core
GenuineIntel-6-2C,v5,westmereep-dp,core

1 Family-model Version Filename EventType
33 GenuineIntel-6-AF v1.11 sierraforest core
34 GenuineIntel-6-(37|4A|4C|4D|5A) v15 silvermont core
35 GenuineIntel-6-(4E|5E|8E|9E|A5|A6) v59 skylake core
36 GenuineIntel-6-55-[01234] v1.36 v1.37 skylakex core
37 GenuineIntel-6-86 v1.23 snowridgex core
38 GenuineIntel-6-8[CD] v1.17 tigerlake core
39 GenuineIntel-6-2C v5 westmereep-dp core

2
tools/perf/pmu-events/arch/x86/skylakex/pipeline.json
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@ -542,7 +542,7 @@
"Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "LOAD_HIT_PRE.SW_PF",
"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
"PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
"SampleAfterValue": "100003",
"UMask": "0x1"
},