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arm64: dts: rockchip: Enable dmc and dfi nodes on gru

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Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY
Interface) nodes on gru boards so we can support DDR DVFS.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220308110825.v4.12.I3a5c7f21ecd8221b42c2dbcd618386bce7b3e9a6@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Lin Huang 2022-03-08 11:08:58 -08:00 committed by Heiko Stuebner
parent 1b3f36854a
commit 80bc6f34c5
4 changed files with 72 additions and 0 deletions
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7
arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
View File

@ -234,6 +234,13 @@ &cdn_dp {
extcon = <&usbc_extcon0>, <&usbc_extcon1>;
};
&dmc {
center-supply = <&ppvar_centerlogic>;
rockchip,pd-idle-dis-freq-hz = <800000000>;
rockchip,sr-idle-dis-freq-hz = <800000000>;
rockchip,sr-mc-gate-idle-dis-freq-hz = <800000000>;
};
&edp {
status = "okay";

12
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
View File

@ -391,6 +391,18 @@ &cru {
<400000000>;
};
/* The center supply is fixed to .9V on scarlet */
&dmc {
center-supply = <&pp900_s0>;
};
/* We don't need .925 V for 928 MHz on scarlet */
&dmc_opp_table {
opp03 {
opp-microvolt = <900000>;
};
};
&gpio0 {
gpio-line-names = /* GPIO0 A 0-7 */
"CLK_32K_AP",

28
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
View File

@ -373,6 +373,34 @@ &cru {
<200000000>;
};
&dfi {
status = "okay";
};
&dmc {
status = "okay";
rockchip,pd-idle-ns = <160>;
rockchip,sr-idle-ns = <10240>;
rockchip,sr-mc-gate-idle-ns = <40960>;
rockchip,srpd-lite-idle-ns = <61440>;
rockchip,standby-idle-ns = <81920>;
rockchip,ddr3_odt_dis_freq = <666000000>;
rockchip,lpddr3_odt_dis_freq = <666000000>;
rockchip,lpddr4_odt_dis_freq = <666000000>;
rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>;
rockchip,srpd-lite-idle-dis-freq-hz = <0>;
rockchip,standby-idle-dis-freq-hz = <928000000>;
};
&dmc_opp_table {
opp03 {
opp-suspend;
};
};
&emmc_phy {
status = "okay";
};

25
arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
View File

@ -110,6 +110,27 @@ opp05 {
opp-microvolt = <1075000>;
};
};
dmc_opp_table: dmc_opp_table {
compatible = "operating-points-v2";
opp00 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <900000>;
};
opp01 {
opp-hz = /bits/ 64 <666000000>;
opp-microvolt = <900000>;
};
opp02 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <900000>;
};
opp03 {
opp-hz = /bits/ 64 <928000000>;
opp-microvolt = <925000>;
};
};
};
&cpu_l0 {
@ -136,6 +157,10 @@ &cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
};
&dmc {
operating-points-v2 = <&dmc_opp_table>;
};
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};