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Merge branch '20260303034847.13870-2-val@packett.cool' into clk-for-7.1

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Merge the definition of MDSS resets for SM6115 and SM6125 to allow them
to be made available in the DeviceTree branch.
This commit is contained in:
Bjorn Andersson 2026-03-11 15:44:31 -05:00
commit 8081dbb031
2 changed files with 10 additions and 3 deletions
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6
include/dt-bindings/clock/qcom,dispcc-sm6125.h
View File

@ -6,6 +6,7 @@
#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H
/* Clocks */
#define DISP_CC_PLL0 0
#define DISP_CC_MDSS_AHB_CLK 1
#define DISP_CC_MDSS_AHB_CLK_SRC 2
@ -35,7 +36,10 @@
#define DISP_CC_MDSS_VSYNC_CLK_SRC 26
#define DISP_CC_XO_CLK 27
/* DISP_CC GDSCR */
/* Resets */
#define DISP_CC_MDSS_CORE_BCR 0
/* GDSCs */
#define MDSS_GDSC 0
#endif

7
include/dt-bindings/clock/qcom,sm6115-dispcc.h
View File

@ -6,7 +6,7 @@
#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H
/* DISP_CC clocks */
/* Clocks */
#define DISP_CC_PLL0 0
#define DISP_CC_PLL0_OUT_MAIN 1
#define DISP_CC_MDSS_AHB_CLK 2
@ -30,7 +30,10 @@
#define DISP_CC_SLEEP_CLK 20
#define DISP_CC_SLEEP_CLK_SRC 21
/* DISP_CC GDSCR */
/* Resets */
#define DISP_CC_MDSS_CORE_BCR 0
/* GDSCs */
#define MDSS_GDSC 0
#endif