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gpio fixes for v6.13
- convert regular spinlock to raw spinlock in gpio-xilinx to avoid a lockdep splat -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmeKTCoACgkQEacuoBRx 13KDfw/+JDW949lcZsIf9ZqZmIG9l2wdC20HWd6Jb4PPEVjWvYXTYwBhTz7J5YLC jF35x7mOM7mDxHPAHg2O4lqFoE+0pwkFJrtd3uYuNI9F/lWYvja6r0RYXlAKhmd4 GZEcQzYvOWCLJ5IEw0M86xbBkD4CmFrKH3CKbQrV0xX8cZW+jWcdmi/mXCinrobp sh4tk2gbhjv3lgYegiKLrFkbeJAYDwFIRbf+M0yo8g0EhE+miM1YBlBH2RZ0c43s p8L5bsN3xtPhaFOX/LayItmk4sx1jr0vC56RTeYhUuVYBZsK/M8QOytzK4ypsbNM QzaeKD1kyrOiXg4dTuwhqGO6g2nONHoLyHbPbIDbOjSP+vUw6JNPZkuldpbiJM+N C8NQKFv6JmfKXK9zWOhMNWxk0ae52VHU2s6e29L3N2KKBG9vOUS6r8ImQ27SXplC yCB21qLIVlp3bSv4mpMoPn+oJaiOAoyykCqSbbGjIo9zoKliI09ctD0tA/X2tPBK kq5tBuYWzNQ0QPLRXpEaG3reZQai8+H7T972yn0G7KPj/ipWKDzWx1A4LZejblgz 1MFXTqFK0rB+luTU7sOlZVQuBCl0KfP7To0mEsh4BwjsCBr5qzbUJXQ+I/d2Uh6h RmEKExjy2nqvdtU89k+HW0UFkCMwlHpArKfCXY2SFzEPEXbAF1c= =WhW4 -----END PGP SIGNATURE----- Merge tag 'gpio-fixes-for-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio fix from Bartosz Golaszewski: - convert regular spinlock to raw spinlock in gpio-xilinx to avoid a lockdep splat * tag 'gpio-fixes-for-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: xilinx: Convert gpio_lock to raw spinlock
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commit
7fed891d6e
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@ -65,7 +65,7 @@ struct xgpio_instance {
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DECLARE_BITMAP(state, 64);
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DECLARE_BITMAP(last_irq_read, 64);
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DECLARE_BITMAP(dir, 64);
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spinlock_t gpio_lock; /* For serializing operations */
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raw_spinlock_t gpio_lock; /* For serializing operations */
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int irq;
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DECLARE_BITMAP(enable, 64);
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DECLARE_BITMAP(rising_edge, 64);
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@ -179,14 +179,14 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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struct xgpio_instance *chip = gpiochip_get_data(gc);
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int bit = xgpio_to_bit(chip, gpio);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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raw_spin_lock_irqsave(&chip->gpio_lock, flags);
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/* Write to GPIO signal and set its direction to output */
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__assign_bit(bit, chip->state, val);
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xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state);
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
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}
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/**
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@ -210,7 +210,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
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bitmap_remap(hw_mask, mask, chip->sw_map, chip->hw_map, 64);
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bitmap_remap(hw_bits, bits, chip->sw_map, chip->hw_map, 64);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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raw_spin_lock_irqsave(&chip->gpio_lock, flags);
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bitmap_replace(state, chip->state, hw_bits, hw_mask, 64);
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@ -218,7 +218,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
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bitmap_copy(chip->state, state, 64);
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
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}
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/**
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@ -236,13 +236,13 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
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struct xgpio_instance *chip = gpiochip_get_data(gc);
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int bit = xgpio_to_bit(chip, gpio);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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raw_spin_lock_irqsave(&chip->gpio_lock, flags);
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/* Set the GPIO bit in shadow register and set direction as input */
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__set_bit(bit, chip->dir);
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xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir);
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
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return 0;
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}
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@ -265,7 +265,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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struct xgpio_instance *chip = gpiochip_get_data(gc);
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int bit = xgpio_to_bit(chip, gpio);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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raw_spin_lock_irqsave(&chip->gpio_lock, flags);
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/* Write state of GPIO signal */
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__assign_bit(bit, chip->state, val);
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@ -275,7 +275,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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__clear_bit(bit, chip->dir);
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xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir);
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
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return 0;
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}
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@ -398,7 +398,7 @@ static void xgpio_irq_mask(struct irq_data *irq_data)
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int bit = xgpio_to_bit(chip, irq_offset);
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u32 mask = BIT(bit / 32), temp;
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spin_lock_irqsave(&chip->gpio_lock, flags);
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raw_spin_lock_irqsave(&chip->gpio_lock, flags);
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__clear_bit(bit, chip->enable);
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@ -408,7 +408,7 @@ static void xgpio_irq_mask(struct irq_data *irq_data)
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temp &= ~mask;
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xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, temp);
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}
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
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gpiochip_disable_irq(&chip->gc, irq_offset);
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}
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@ -428,7 +428,7 @@ static void xgpio_irq_unmask(struct irq_data *irq_data)
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gpiochip_enable_irq(&chip->gc, irq_offset);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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raw_spin_lock_irqsave(&chip->gpio_lock, flags);
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__set_bit(bit, chip->enable);
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@ -447,7 +447,7 @@ static void xgpio_irq_unmask(struct irq_data *irq_data)
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xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, val);
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}
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);
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}
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/**
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@ -512,7 +512,7 @@ static void xgpio_irqhandler(struct irq_desc *desc)
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chained_irq_enter(irqchip, desc);
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spin_lock(&chip->gpio_lock);
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raw_spin_lock(&chip->gpio_lock);
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xgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, all);
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@ -529,7 +529,7 @@ static void xgpio_irqhandler(struct irq_desc *desc)
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bitmap_copy(chip->last_irq_read, all, 64);
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bitmap_or(all, rising, falling, 64);
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spin_unlock(&chip->gpio_lock);
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raw_spin_unlock(&chip->gpio_lock);
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dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling);
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@ -620,7 +620,7 @@ static int xgpio_probe(struct platform_device *pdev)
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bitmap_set(chip->hw_map, 0, width[0]);
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bitmap_set(chip->hw_map, 32, width[1]);
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spin_lock_init(&chip->gpio_lock);
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raw_spin_lock_init(&chip->gpio_lock);
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chip->gc.base = -1;
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chip->gc.ngpio = bitmap_weight(chip->hw_map, 64);
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