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STi DT for v6.11 :

Browse Source 
_ Add #thermal-sensor-cells property on stih410.dtsi and stih418.dtsi
 _ Add thermal-zones support on stih418
 _
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Merge tag 'sti-dt-for-v6.11-round1' of https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into soc/dt

STi DT for v6.11 :

_ Add #thermal-sensor-cells property on stih410.dtsi and stih418.dtsi
_ Add thermal-zones support on stih418
_
This commit is contained in:
Arnd Bergmann 2024-06-28 17:31:49 +02:00
commit 7fd04cf257
3 changed files with 44 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/st/stih407-family.dtsi
View File

@ -33,7 +33,7 @@ delta_reserved: rproc@44000000 {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
@ -52,8 +52,9 @@ cpu@0 {
clock-latency = <100000>;
cpu0-supply = <&pwm_regulator>;
st,syscfg = <&syscfg_core 0x8e0>;
#cooling-cells = <2>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
@ -66,6 +67,7 @@ cpu@1 {
1200000 0
800000 0
500000 0>;
#cooling-cells = <2>;
};
};

1
arch/arm/boot/dts/st/stih410.dtsi
View File

@ -270,6 +270,7 @@ thermal@91a0000 {
clock-names = "thermal";
clocks = <&clk_sysin>;
interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
#thermal-sensor-cells = <0>;
};
cec@94a087c {

42
arch/arm/boot/dts/st/stih418.dtsi
View File

@ -6,23 +6,26 @@
#include "stih418-clock.dtsi"
#include "stih407-family.dtsi"
#include "stih410-pinctrl.dtsi"
#include <dt-bindings/thermal/thermal.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@2 {
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <2>;
/* u-boot puts hpen in SBC dmem at 0xa4 offset */
cpu-release-addr = <0x94100A4>;
#cooling-cells = <2>;
};
cpu@3 {
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <3>;
/* u-boot puts hpen in SBC dmem at 0xa4 offset */
cpu-release-addr = <0x94100A4>;
#cooling-cells = <2>;
};
};
@ -44,6 +47,38 @@ usb2_picophy2: phy3 {
reset-names = "global", "port";
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <250>; /* 250ms */
polling-delay = <1000>; /* 1000ms */
thermal-sensors = <&thermal>;
trips {
cpu_crit: cpu-crit {
temperature = <95000>; /* 95C */
hysteresis = <2000>;
type = "critical";
};
cpu_alert: cpu-alert {
temperature = <85000>; /* 85C */
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
map {
trip = <&cpu_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
soc {
rng11: rng@8a8a000 {
status = "disabled";
@ -107,12 +142,13 @@ mmc0: sdhci@9060000 {
assigned-clock-rates = <200000000>;
};
thermal@91a0000 {
thermal: thermal@91a0000 {
compatible = "st,stih407-thermal";
reg = <0x91a0000 0x28>;
clock-names = "thermal";
clocks = <&clk_sysin>;
interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
#thermal-sensor-cells = <0>;
};
};
};