ARM: dts: rockchip: rk312x fix to SCLK_CIF_OUT for cif out clk

Change-Id: Id78693129890ddff151753229681b00b911859c9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This commit is contained in:
Jianqun Xu 2017-11-27 16:36:16 +08:00
parent 0250b83f98
commit 7fb197a5cf

View File

@ -418,7 +418,7 @@ cif: cif@1010a000 {
reg = <0x1010a000 0x200>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>,
<&cru SCLK_CIF_SRC>, <&cru SCLK_CIF_OUT_SRC>;
<&cru SCLK_CIF_SRC>, <&cru SCLK_CIF_OUT>;
clock-names = "aclk_cif0", "hclk_cif0",
"cif0_in", "cif0_out";
resets = <&cru SRST_CIF0>;