From 7e9be8bac377837bc88dc85c3707a09beaf5a38f Mon Sep 17 00:00:00 2001
From: Tao Huang <huangtao@rock-chips.com>
Date: Wed, 28 Mar 2018 19:21:44 +0800
Subject: [PATCH] ARM: dts: rockchip: fix dtc warnings of rk3288

Change-Id: I179a394f83cf75672441db54aede62029eecf799
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
---
 arch/arm/boot/dts/rk3288-android.dtsi       | 2 +-
 arch/arm/boot/dts/rk3288-firefly-reload.dts | 4 ++--
 arch/arm/boot/dts/rk3288.dtsi               | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288-android.dtsi b/arch/arm/boot/dts/rk3288-android.dtsi
index 7ecaf10259d6..ddd2a2c5d4ac 100644
--- a/arch/arm/boot/dts/rk3288-android.dtsi
+++ b/arch/arm/boot/dts/rk3288-android.dtsi
@@ -163,7 +163,7 @@ ramoops {
 
 	fiq-debugger {
 		compatible = "rockchip,fiq-debugger";
-		interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 		rockchip,serial-id = <2>;
 		rockchip,wake-irq = <0>;
 		rockchip,irq-mode-enable = <0>;  /* If enable uart uses irq instead of fiq */
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts
index ab5ecd4e7b63..15ccfd8e4276 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload.dts
+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts
@@ -174,7 +174,7 @@ ramoops {
 
 	fiq-debugger {
 		compatible = "rockchip,fiq-debugger";
-		interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 		rockchip,serial-id = <2>;
 		rockchip,wake-irq = <0>;
 		/* If enable uart uses irq instead of fiq */
@@ -710,7 +710,7 @@ &usb_otg {
 
 &pwm0 {
 	status = "okay";
-	interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH 0>;
+	interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 	compatible = "rockchip,remotectl-pwm";
 	remote_pwm_id = <0>;
 	handle_cpu_id = <0>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 9d68f38b7753..15ee5834d0d0 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1148,7 +1148,7 @@ iep: iep@ff90000 {
 		iommu_enabled = <1>;
 		iommus = <&iep_mmu>;
 		reg = <0x0 0xff900000 0x0 0x800>;
-		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
 		clock-names = "aclk_iep", "hclk_iep";
 		power-domains = <&power RK3288_PD_VIO>;
@@ -1160,7 +1160,7 @@ iep: iep@ff90000 {
 	iep_mmu: iommu@ff900800 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff900800 0x0 0x40>;
-		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "iep_mmu";
 		#iommu-cells = <0>;
 		status = "disabled";