dt-bindings: clock: versal-clk: Fix Versal NET clock validation

The Versal NET clock controller compatible is specified as:
  compatible = "xlnx,versal-net-clk", "xlnx,versal-clk";

with xlnx,versal-clk listed as fallback. The original binding had
two separate if/then blocks - one matching xlnx,versal-clk (2 clocks)
and another matching xlnx,versal-net-clk (3 clocks). Since both
compatible strings are present, both conditions matched simultaneously
and JSON Schema applied the more restrictive 2-clock constraint,
causing false "too long" validation errors for Versal NET.

Define clock-names at the top-level and use if/then only to constrain
the clock count (2 for Versal, 3 for Versal NET). Add a dedicated
example for the Versal NET 3-clock configuration.

Fixes: 39118392d1 ("dt-bindings: Remove alt_ref from versal")
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/202e448e57cf979e1b5be61da0bad7778defdd4e.1783516336.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Michal Simek 2026-07-08 15:12:25 +02:00
parent d0d3f0f8ae
commit 7dc3776a5f

View File

@ -30,11 +30,17 @@ properties:
description: List of clock specifiers which are external input
clocks to the given clock controller.
minItems: 2
maxItems: 3
items:
- description: reference clock
- description: alternate reference clock for programmable logic
- description: alternate reference clock
clock-names:
minItems: 2
maxItems: 3
items:
- const: ref
- const: pl_alt_ref
- const: alt_ref
required:
- compatible
@ -45,45 +51,24 @@ required:
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- xlnx,versal-clk
then:
properties:
clocks:
items:
- description: reference clock
- description: alternate reference clock for programmable logic
clock-names:
items:
- const: ref
- const: pl_alt_ref
- if:
properties:
compatible:
contains:
enum:
- xlnx,versal-net-clk
then:
properties:
clocks:
items:
- description: reference clock
- description: alternate reference clock for programmable logic
- description: alternate reference clock
minItems: 3
clock-names:
items:
- const: ref
- const: pl_alt_ref
- const: alt_ref
minItems: 3
else:
properties:
clocks:
maxItems: 2
clock-names:
maxItems: 2
examples:
- |
@ -99,4 +84,12 @@ examples:
};
};
};
- |
clock-controller {
compatible = "xlnx,versal-net-clk", "xlnx,versal-clk";
clocks = <&ref>, <&pl_alt_ref>, <&alt_ref>;
clock-names = "ref", "pl_alt_ref", "alt_ref";
#clock-cells = <1>;
};
...