github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-31 10:33:41 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

net: stmmac: add struct stmmac_pcs_info

Browse Source 
We need to describe one more register (offset and field bitmask) to
the PCS code. Move the existing PCS offset and interrupt enable bits
to a new struct and pass that in to stmmac_integrated_pcs_init().

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w2tPU-0000000DYAd-0ssk@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Russell King (Oracle) 2026-03-18 16:06:16 +00:00 committed by Jakub Kicinski
parent 9a475dc71c
commit 7d5a2da501
4 changed files with 23 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
View File

@ -22,14 +22,17 @@
#include "stmmac_ptp.h"
#include "dwmac1000.h"
static const struct stmmac_pcs_info dwmac1000_pcs_info = {
.pcs_offset = GMAC_PCS_BASE,
.int_mask = GMAC_INT_DISABLE_PCSLINK | GMAC_INT_DISABLE_PCSAN,
};
static int dwmac1000_pcs_init(struct stmmac_priv *priv)
{
if (!priv->dma_cap.pcs)
return 0;
return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
GMAC_INT_DISABLE_PCSLINK |
GMAC_INT_DISABLE_PCSAN);
return stmmac_integrated_pcs_init(priv, &dwmac1000_pcs_info);
}
static void dwmac1000_core_init(struct mac_device_info *hw,

8
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
View File

@ -22,13 +22,17 @@
#include "dwmac4.h"
#include "dwmac5.h"
static const struct stmmac_pcs_info dwmac4_pcs_info = {
.pcs_offset = GMAC_PCS_BASE,
.int_mask = GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE,
};
static int dwmac4_pcs_init(struct stmmac_priv *priv)
{
if (!priv->dma_cap.pcs)
return 0;
return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE);
return stmmac_integrated_pcs_init(priv, &dwmac4_pcs_info);
}
static void dwmac4_core_init(struct mac_device_info *hw,

8
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
View File

@ -90,8 +90,8 @@ int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
return -EINVAL;
}
int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
u32 int_mask)
int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
const struct stmmac_pcs_info *pcs_info)
{
struct stmmac_pcs *spcs;
@ -100,8 +100,8 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
return -ENOMEM;
spcs->priv = priv;
spcs->base = priv->ioaddr + offset;
spcs->int_mask = int_mask;
spcs->base = priv->ioaddr + pcs_info->pcs_offset;
spcs->int_mask = pcs_info->int_mask;
spcs->pcs.ops = &dwmac_integrated_pcs_ops;
__set_bit(PHY_INTERFACE_MODE_SGMII, spcs->pcs.supported_interfaces);

9
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
View File

@ -27,6 +27,11 @@
struct stmmac_priv;
struct stmmac_pcs_info {
unsigned int pcs_offset;
u32 int_mask;
};
struct stmmac_pcs {
struct stmmac_priv *priv;
void __iomem *base;
@ -44,8 +49,8 @@ void stmmac_integrated_pcs_irq(struct stmmac_priv *priv, u32 status,
struct stmmac_extra_stats *x);
int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
phy_interface_t interface);
int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
u32 int_mask);
int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
const struct stmmac_pcs_info *pcs_info);
/**
* dwmac_ctrl_ane - To program the AN Control Register.