arm64: dts: renesas: r8a779a0: Add GE7800 GPU node

Describe Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64
present in Renesas R-Car R8A779A0 V3U SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251106212342.2771579-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Niklas Söderlund 2025-11-06 22:23:42 +01:00 committed by Geert Uytterhoeven
parent 3bef06115a
commit 7d41b3085b

View File

@ -2337,6 +2337,23 @@ gic: interrupt-controller@f1000000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
gpu: gpu@fd000000 {
compatible = "renesas,r8a779a0-gpu",
"img,img-ge7800",
"img,img-rogue";
reg = <0 0xfd000000 0 0x40000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_CORE R8A779A0_CLK_ZG>,
<&cpg CPG_CORE R8A779A0_CLK_S3D1>,
<&cpg CPG_MOD 0>;
clock-names = "core", "mem", "sys";
power-domains = <&sysc R8A779A0_PD_3DG_A>,
<&sysc R8A779A0_PD_3DG_B>;
power-domain-names = "a", "b";
resets = <&cpg 0>;
status = "disabled";
};
fcpvd0: fcp@fea10000 {
compatible = "renesas,fcpv";
reg = <0 0xfea10000 0 0x200>;