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drm/msm: Fix some typos in comment
Fixed some spelling errors, the details are as follows: -in the code comments: collpase->collapse firwmare->firmware everwhere->everywhere Fixes:2401a00846("drm/msm: gpu: Add support for the GPMU") Fixes:5a903a44a9("drm/msm/a6xx: Introduce GMU wrapper support") Fixes:f97decac5f("drm/msm: Support multiple ringbuffers") Signed-off-by: Shen Lichuan <shenlichuan@vivo.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/614109/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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@ -307,7 +307,7 @@ int a5xx_power_init(struct msm_gpu *gpu)
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else if (adreno_is_a540(adreno_gpu))
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a540_lm_setup(gpu);
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/* Set up SP/TP power collpase */
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/* Set up SP/TP power collapse */
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a5xx_pc_init(gpu);
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/* Start the GPMU */
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@ -533,7 +533,7 @@ int adreno_load_fw(struct adreno_gpu *adreno_gpu)
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if (!adreno_gpu->info->fw[i])
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continue;
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/* Skip loading GMU firwmare with GMU Wrapper */
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/* Skip loading GMU firmware with GMU Wrapper */
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if (adreno_has_gmu_wrapper(adreno_gpu) && i == ADRENO_FW_GMU)
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continue;
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@ -64,7 +64,7 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
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char name[32];
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int ret;
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/* We assume everwhere that MSM_GPU_RINGBUFFER_SZ is a power of 2 */
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/* We assume everywhere that MSM_GPU_RINGBUFFER_SZ is a power of 2 */
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BUILD_BUG_ON(!is_power_of_2(MSM_GPU_RINGBUFFER_SZ));
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ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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