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drm/sun4i: ui_layer: use layer struct instead of multiple args
This change is equally a cleanup (less arguments) and preparation for DE33 separate plane driver. It will introduce additional register space. Reviewed-by: Chen-Yu Tsai <wens@kernel.org> Tested-by: Ryan Walklin <ryan@testtoast.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251104180942.61538-17-jernej.skrabec@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
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commit
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@ -26,24 +26,24 @@
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#include "sun8i_ui_scaler.h"
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#include "sun8i_vi_scaler.h"
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static void sun8i_ui_layer_disable(struct sun8i_mixer *mixer,
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int channel, int overlay)
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static void sun8i_ui_layer_disable(struct sun8i_layer *layer)
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{
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u32 ch_base = sun8i_channel_base(mixer, channel);
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struct sun8i_mixer *mixer = layer->mixer;
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u32 ch_base = sun8i_channel_base(mixer, layer->channel);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), 0);
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SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), 0);
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}
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static void sun8i_ui_layer_update_attributes(struct sun8i_mixer *mixer,
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int channel, int overlay,
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static void sun8i_ui_layer_update_attributes(struct sun8i_layer *layer,
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struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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struct sun8i_mixer *mixer = layer->mixer;
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const struct drm_format_info *fmt;
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u32 val, ch_base, hw_fmt;
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ch_base = sun8i_channel_base(mixer, channel);
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ch_base = sun8i_channel_base(mixer, layer->channel);
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fmt = state->fb->format;
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sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
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@ -55,22 +55,23 @@ static void sun8i_ui_layer_update_attributes(struct sun8i_mixer *mixer,
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val |= SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN;
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), val);
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SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), val);
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}
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static void sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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int overlay, struct drm_plane *plane)
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static void sun8i_ui_layer_update_coord(struct sun8i_layer *layer,
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struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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struct sun8i_mixer *mixer = layer->mixer;
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u32 src_w, src_h, dst_w, dst_h;
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u32 outsize, insize;
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u32 hphase, vphase;
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u32 ch_base;
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DRM_DEBUG_DRIVER("Updating UI channel %d overlay %d\n",
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channel, overlay);
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layer->channel, layer->overlay);
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ch_base = sun8i_channel_base(mixer, channel);
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ch_base = sun8i_channel_base(mixer, layer->channel);
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src_w = drm_rect_width(&state->src) >> 16;
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src_h = drm_rect_height(&state->src) >> 16;
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@ -88,7 +89,7 @@ static void sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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state->src.x1 >> 16, state->src.y1 >> 16);
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DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, overlay),
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SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, layer->overlay),
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insize);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch_base),
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@ -103,37 +104,38 @@ static void sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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vscale = state->src_h / state->crtc_h;
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if (mixer->cfg->de_type == SUN8I_MIXER_DE33) {
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sun8i_vi_scaler_setup(mixer, channel, src_w, src_h,
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sun8i_vi_scaler_setup(mixer, layer->channel, src_w, src_h,
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dst_w, dst_h, hscale, vscale,
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hphase, vphase,
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state->fb->format);
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sun8i_vi_scaler_enable(mixer, channel, true);
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sun8i_vi_scaler_enable(mixer, layer->channel, true);
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} else {
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sun8i_ui_scaler_setup(mixer, channel, src_w, src_h,
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sun8i_ui_scaler_setup(mixer, layer->channel, src_w, src_h,
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dst_w, dst_h, hscale, vscale,
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hphase, vphase);
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sun8i_ui_scaler_enable(mixer, channel, true);
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sun8i_ui_scaler_enable(mixer, layer->channel, true);
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}
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} else {
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DRM_DEBUG_DRIVER("HW scaling is not needed\n");
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if (mixer->cfg->de_type == SUN8I_MIXER_DE33)
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sun8i_vi_scaler_enable(mixer, channel, false);
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sun8i_vi_scaler_enable(mixer, layer->channel, false);
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else
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sun8i_ui_scaler_enable(mixer, channel, false);
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sun8i_ui_scaler_enable(mixer, layer->channel, false);
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}
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}
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static void sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel,
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int overlay, struct drm_plane *plane)
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static void sun8i_ui_layer_update_buffer(struct sun8i_layer *layer,
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struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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struct sun8i_mixer *mixer = layer->mixer;
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struct drm_framebuffer *fb = state->fb;
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struct drm_gem_dma_object *gem;
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dma_addr_t dma_addr;
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u32 ch_base;
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int bpp;
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ch_base = sun8i_channel_base(mixer, channel);
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ch_base = sun8i_channel_base(mixer, layer->channel);
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/* Get the physical address of the buffer in memory */
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gem = drm_fb_dma_get_gem_obj(fb, 0);
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@ -151,13 +153,13 @@ static void sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel,
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/* Set the line width */
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DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, overlay),
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SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, layer->overlay),
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fb->pitches[0]);
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DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, overlay),
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SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, layer->overlay),
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lower_32_bits(dma_addr));
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}
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@ -208,19 +210,15 @@ static void sun8i_ui_layer_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
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plane);
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struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
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struct sun8i_mixer *mixer = layer->mixer;
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if (!new_state->crtc || !new_state->visible) {
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sun8i_ui_layer_disable(mixer, layer->channel, layer->overlay);
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sun8i_ui_layer_disable(layer);
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return;
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}
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sun8i_ui_layer_update_attributes(mixer, layer->channel,
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layer->overlay, plane);
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sun8i_ui_layer_update_coord(mixer, layer->channel,
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layer->overlay, plane);
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sun8i_ui_layer_update_buffer(mixer, layer->channel,
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layer->overlay, plane);
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sun8i_ui_layer_update_attributes(layer, plane);
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sun8i_ui_layer_update_coord(layer, plane);
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sun8i_ui_layer_update_buffer(layer, plane);
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}
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static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
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