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ARM: dts: qcom: sdx55-fn980: Enable PCIe EP
Enable PCIe Endpoint controller on the Telit FN980 TLB board based on Qualcomm SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211126070520.28979-5-manivannan.sadhasivam@linaro.org
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@ -243,6 +243,14 @@ &pcie0_phy {
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vdda-pll-supply = <&vreg_l4e_bb_0p875>;
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};
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&pcie_ep {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default
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&pcie_ep_wake_default>;
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};
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&qpic_bam {
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status = "ok";
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};
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@ -267,6 +275,44 @@ &remoteproc_mpss {
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memory-region = <&mpss_adsp_mem>;
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};
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&tlmm {
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pcie_ep_clkreq_default: pcie_ep_clkreq_default {
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mux {
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pins = "gpio56";
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function = "pcie_clkreq";
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};
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config {
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pins = "gpio56";
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drive-strength = <2>;
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bias-disable;
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};
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};
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pcie_ep_perst_default: pcie_ep_perst_default {
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mux {
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pins = "gpio57";
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function = "gpio";
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};
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config {
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pins = "gpio57";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie_ep_wake_default: pcie_ep_wake_default {
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mux {
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pins = "gpio53";
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function = "gpio";
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};
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config {
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pins = "gpio53";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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&usb_hsphy {
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status = "okay";
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vdda-pll-supply = <&vreg_l4e_bb_0p875>;
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