ARM: dts: qcom: sdx55-fn980: Enable PCIe EP

Enable PCIe Endpoint controller on the Telit FN980 TLB board based
on Qualcomm SDX55 platform.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211126070520.28979-5-manivannan.sadhasivam@linaro.org
This commit is contained in:
Manivannan Sadhasivam 2021-11-26 12:35:18 +05:30 committed by Bjorn Andersson
parent e6b6981328
commit 7cecfb53ca

View File

@ -243,6 +243,14 @@ &pcie0_phy {
vdda-pll-supply = <&vreg_l4e_bb_0p875>;
};
&pcie_ep {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default
&pcie_ep_wake_default>;
};
&qpic_bam {
status = "ok";
};
@ -267,6 +275,44 @@ &remoteproc_mpss {
memory-region = <&mpss_adsp_mem>;
};
&tlmm {
pcie_ep_clkreq_default: pcie_ep_clkreq_default {
mux {
pins = "gpio56";
function = "pcie_clkreq";
};
config {
pins = "gpio56";
drive-strength = <2>;
bias-disable;
};
};
pcie_ep_perst_default: pcie_ep_perst_default {
mux {
pins = "gpio57";
function = "gpio";
};
config {
pins = "gpio57";
drive-strength = <2>;
bias-pull-down;
};
};
pcie_ep_wake_default: pcie_ep_wake_default {
mux {
pins = "gpio53";
function = "gpio";
};
config {
pins = "gpio53";
drive-strength = <2>;
bias-disable;
};
};
};
&usb_hsphy {
status = "okay";
vdda-pll-supply = <&vreg_l4e_bb_0p875>;