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drm/xe/xe2hpm: Add initial set of workarounds

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Define the initial set of workarounds for Xe2_HPM.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-12-balasubramani.vivekanandan@intel.com
This commit is contained in:
Gustavo Sousa 2024-04-08 22:35:45 +05:30 committed by Matt Roper
parent e391ab659b
commit 7cd05ef89c
2 changed files with 36 additions and 0 deletions
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4
drivers/gpu/drm/xe/regs/xe_gt_regs.h
View File

@ -280,6 +280,10 @@
#define FORCEWAKE_GT XE_REG(0xa188) #define FORCEWAKE_GT XE_REG(0xa188)
#define PG_ENABLE XE_REG(0xa210) #define PG_ENABLE XE_REG(0xa210)
#define VD2_MFXVDENC_POWERGATE_ENABLE REG_BIT(8)
#define VD2_HCP_POWERGATE_ENABLE REG_BIT(7)
#define VD0_MFXVDENC_POWERGATE_ENABLE REG_BIT(4)
#define VD0_HCP_POWERGATE_ENABLE REG_BIT(3)
#define CTC_MODE XE_REG(0xa26c) #define CTC_MODE XE_REG(0xa26c)
#define CTC_SHIFT_PARAMETER_MASK REG_GENMASK(2, 1) #define CTC_SHIFT_PARAMETER_MASK REG_GENMASK(2, 1)

32
drivers/gpu/drm/xe/xe_wa.c
View File

@ -228,6 +228,28 @@ static const struct xe_rtp_entry_sr gt_was[] = {
XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
}, },
/* Xe2_HPM */
{ XE_RTP_NAME("16021867713"),
XE_RTP_RULES(MEDIA_VERSION(1301),
ENGINE_CLASS(VIDEO_DECODE)),
XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
},
{ XE_RTP_NAME("14020316580"),
XE_RTP_RULES(MEDIA_VERSION(1301)),
XE_RTP_ACTIONS(CLR(PG_ENABLE,
VD0_HCP_POWERGATE_ENABLE |
VD0_MFXVDENC_POWERGATE_ENABLE |
VD2_HCP_POWERGATE_ENABLE |
VD2_MFXVDENC_POWERGATE_ENABLE)),
},
{ XE_RTP_NAME("14019449301"),
XE_RTP_RULES(MEDIA_VERSION(1301), ENGINE_CLASS(VIDEO_DECODE)),
XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F08(0), CG3DDISHRS_CLKGATE_DIS)),
XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
},
{} {}
}; };
@ -513,6 +535,16 @@ static const struct xe_rtp_entry_sr engine_was[] = {
XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, WR_REQ_CHAINING_DIS)) XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, WR_REQ_CHAINING_DIS))
}, },
/* Xe2_HPM */
{ XE_RTP_NAME("16021639441"),
XE_RTP_RULES(MEDIA_VERSION(1301)),
XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
GHWSP_CSB_REPORT_DIS |
PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
},
{} {}
}; };