github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-09-26 10:02:02 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: renesas: r9a09g047: Add RZ/G3E Sound support

Browse Source 
Add the snd_rzg3e node for the RZ/G3E SoC with all sub-components:
  - SSI (Serial Sound Interface) units 0-9,
  - SSIU (Serial Sound Interface Unit) units 0-27,
  - SRC (Sample Rate Converter) units 0-9,
  - CTU (Channel Transfer Unit) units 0-7,
  - DVC (Digital Volume Control) units 0-1,
  - MIX (Mixer) units 0-1.

Sub-node names follow the new RZ/G3E sound binding: unprefixed 'ssi',
'ssiu', 'src', 'dvc', 'mix', 'ctu' wrapper nodes instead of the legacy
'rcar_sound,xxx' R-Car prefix.

Wire up all 5 DMA controllers (dmac0-dmac4) for each audio sub-node with
repeated channel names, so that the DMA core can pick the first
available controller.

Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260619083951.3777556-2-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
John Madieu 2026-06-19 08:39:48 +00:00 committed by Geert Uytterhoeven
parent e7f8013a13
commit 7cb769eb22
1 changed files with 500 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

500
arch/arm64/boot/dts/renesas/r9a09g047.dtsi
View File

@ -912,6 +912,506 @@ rsci9: serial@12803000 {
status = "disabled";
};
snd_rzg3e: sound@13c00000 {
compatible = "renesas,r9a09g047-sound";
reg = <0 0x13c00000 0 0x20000>, /* SCU */
<0 0x13c20000 0 0x10000>, /* ADG */
<0 0x13c30000 0 0x1000>, /* SSIU */
<0 0x13c31000 0 0x1f000>, /* SSI */
<0 0x13c50000 0 0x10000>; /* Audio DMAC peri peri */
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 0xf5>,
<&cpg CPG_MOD 0x181>, <&cpg CPG_MOD 0x182>,
<&cpg CPG_MOD 0x183>, <&cpg CPG_MOD 0x184>,
<&cpg CPG_MOD 0x185>, <&cpg CPG_MOD 0x186>,
<&cpg CPG_MOD 0x187>, <&cpg CPG_MOD 0x188>,
<&cpg CPG_MOD 0x189>, <&cpg CPG_MOD 0x18a>,
<&cpg CPG_MOD 0x174>, <&cpg CPG_MOD 0x175>,
<&cpg CPG_MOD 0x176>, <&cpg CPG_MOD 0x177>,
<&cpg CPG_MOD 0x178>, <&cpg CPG_MOD 0x179>,
<&cpg CPG_MOD 0x17a>, <&cpg CPG_MOD 0x17b>,
<&cpg CPG_MOD 0x17c>, <&cpg CPG_MOD 0x17d>,
<&cpg CPG_MOD 0x172>, <&cpg CPG_MOD 0x173>,
<&cpg CPG_MOD 0x172>, <&cpg CPG_MOD 0x173>,
<&cpg CPG_MOD 0x170>, <&cpg CPG_MOD 0x171>,
<&cpg CPG_MOD 0xfb>, <&cpg CPG_MOD 0xfc>,
<&cpg CPG_MOD 0xfd>, <&cpg CPG_MOD 0xfa>,
<&cpg CPG_MOD 0x180>,
<&cpg CPG_MOD 0xf6>, <&cpg CPG_MOD 0xf7>,
<&cpg CPG_MOD 0x17e>,
<&cpg CPG_MOD 0x160>, <&cpg CPG_MOD 0x161>,
<&cpg CPG_MOD 0x162>, <&cpg CPG_MOD 0x163>,
<&cpg CPG_MOD 0x164>, <&cpg CPG_MOD 0x165>,
<&cpg CPG_MOD 0x166>, <&cpg CPG_MOD 0x167>,
<&cpg CPG_MOD 0x168>, <&cpg CPG_MOD 0x169>,
<&cpg CPG_MOD 0xf8>, <&cpg CPG_MOD 0xf9>;
clock-names = "ssi-all",
"ssi-0", "ssi-1",
"ssi-2", "ssi-3",
"ssi-4", "ssi-5",
"ssi-6", "ssi-7",
"ssi-8", "ssi-9",
"src-0", "src-1",
"src-2", "src-3",
"src-4", "src-5",
"src-6", "src-7",
"src-8", "src-9",
"mix-0", "mix-1",
"ctu-0", "ctu-1",
"dvc-0", "dvc-1",
"audio-clka", "audio-clkb",
"audio-clkc", "audio-clki",
"ssif_supply",
"scu", "scu_x2",
"scu_supply",
"adg-ssi-0", "adg-ssi-1",
"adg-ssi-2", "adg-ssi-3",
"adg-ssi-4", "adg-ssi-5",
"adg-ssi-6", "adg-ssi-7",
"adg-ssi-8", "adg-ssi-9",
"audmapp", "adg";
power-domains = <&cpg>;
resets = <&cpg 0xe1>,
<&cpg 0xe2>, <&cpg 0xe3>,
<&cpg 0xe4>, <&cpg 0xe5>,
<&cpg 0xe6>, <&cpg 0xe7>,
<&cpg 0xe8>, <&cpg 0xe9>,
<&cpg 0xea>, <&cpg 0xeb>,
<&cpg 0xec>, <&cpg 0xee>,
<&cpg 0xed>;
reset-names = "ssi-all",
"ssi-0", "ssi-1",
"ssi-2", "ssi-3",
"ssi-4", "ssi-5",
"ssi-6", "ssi-7",
"ssi-8", "ssi-9",
"scu", "adg",
"audmapp";
status = "disabled";
ctu {
ctu00: ctu-0 { };
ctu01: ctu-1 { };
ctu02: ctu-2 { };
ctu03: ctu-3 { };
ctu10: ctu-4 { };
ctu11: ctu-5 { };
ctu12: ctu-6 { };
ctu13: ctu-7 { };
};
dvc {
dvc0: dvc-0 {
dmas = <&dmac0 0x1db3>, <&dmac1 0x1db3>,
<&dmac2 0x1db3>, <&dmac3 0x1db3>,
<&dmac4 0x1db3>;
dma-names = "tx", "tx", "tx", "tx", "tx";
};
dvc1: dvc-1 {
dmas = <&dmac0 0x1db4>, <&dmac1 0x1db4>,
<&dmac2 0x1db4>, <&dmac3 0x1db4>,
<&dmac4 0x1db4>;
dma-names = "tx", "tx", "tx", "tx", "tx";
};
};
mix {
mix0: mix-0 { };
mix1: mix-1 { };
};
src {
src0: src-0 {
interrupts = <GIC_SPI 902 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1d9f>, <&dmac0 0x1da9>,
<&dmac1 0x1d9f>, <&dmac1 0x1da9>,
<&dmac2 0x1d9f>, <&dmac2 0x1da9>,
<&dmac3 0x1d9f>, <&dmac3 0x1da9>,
<&dmac4 0x1d9f>, <&dmac4 0x1da9>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src1: src-1 {
interrupts = <GIC_SPI 903 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da0>, <&dmac0 0x1daa>,
<&dmac1 0x1da0>, <&dmac1 0x1daa>,
<&dmac2 0x1da0>, <&dmac2 0x1daa>,
<&dmac3 0x1da0>, <&dmac3 0x1daa>,
<&dmac4 0x1da0>, <&dmac4 0x1daa>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src2: src-2 {
interrupts = <GIC_SPI 904 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da1>, <&dmac0 0x1dab>,
<&dmac1 0x1da1>, <&dmac1 0x1dab>,
<&dmac2 0x1da1>, <&dmac2 0x1dab>,
<&dmac3 0x1da1>, <&dmac3 0x1dab>,
<&dmac4 0x1da1>, <&dmac4 0x1dab>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src3: src-3 {
interrupts = <GIC_SPI 905 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da2>, <&dmac0 0x1dac>,
<&dmac1 0x1da2>, <&dmac1 0x1dac>,
<&dmac2 0x1da2>, <&dmac2 0x1dac>,
<&dmac3 0x1da2>, <&dmac3 0x1dac>,
<&dmac4 0x1da2>, <&dmac4 0x1dac>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src4: src-4 {
interrupts = <GIC_SPI 906 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da3>, <&dmac0 0x1dad>,
<&dmac1 0x1da3>, <&dmac1 0x1dad>,
<&dmac2 0x1da3>, <&dmac2 0x1dad>,
<&dmac3 0x1da3>, <&dmac3 0x1dad>,
<&dmac4 0x1da3>, <&dmac4 0x1dad>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 907 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da4>, <&dmac0 0x1dae>,
<&dmac1 0x1da4>, <&dmac1 0x1dae>,
<&dmac2 0x1da4>, <&dmac2 0x1dae>,
<&dmac3 0x1da4>, <&dmac3 0x1dae>,
<&dmac4 0x1da4>, <&dmac4 0x1dae>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 908 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da5>, <&dmac0 0x1daf>,
<&dmac1 0x1da5>, <&dmac1 0x1daf>,
<&dmac2 0x1da5>, <&dmac2 0x1daf>,
<&dmac3 0x1da5>, <&dmac3 0x1daf>,
<&dmac4 0x1da5>, <&dmac4 0x1daf>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src7: src-7 {
interrupts = <GIC_SPI 909 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da6>, <&dmac0 0x1db0>,
<&dmac1 0x1da6>, <&dmac1 0x1db0>,
<&dmac2 0x1da6>, <&dmac2 0x1db0>,
<&dmac3 0x1da6>, <&dmac3 0x1db0>,
<&dmac4 0x1da6>, <&dmac4 0x1db0>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src8: src-8 {
interrupts = <GIC_SPI 910 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da7>, <&dmac0 0x1db1>,
<&dmac1 0x1da7>, <&dmac1 0x1db1>,
<&dmac2 0x1da7>, <&dmac2 0x1db1>,
<&dmac3 0x1da7>, <&dmac3 0x1db1>,
<&dmac4 0x1da7>, <&dmac4 0x1db1>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
src9: src-9 {
interrupts = <GIC_SPI 911 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1da8>, <&dmac0 0x1db2>,
<&dmac1 0x1da8>, <&dmac1 0x1db2>,
<&dmac2 0x1da8>, <&dmac2 0x1db2>,
<&dmac3 0x1da8>, <&dmac3 0x1db2>,
<&dmac4 0x1da8>, <&dmac4 0x1db2>;
dma-names = "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx",
"rx", "tx";
};
};
ssi {
ssi0: ssi-0 {
interrupts = <GIC_SPI 889 IRQ_TYPE_LEVEL_HIGH>;
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 890 IRQ_TYPE_LEVEL_HIGH>;
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 891 IRQ_TYPE_LEVEL_HIGH>;
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 892 IRQ_TYPE_LEVEL_HIGH>;
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 893 IRQ_TYPE_LEVEL_HIGH>;
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 894 IRQ_TYPE_LEVEL_HIGH>;
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 895 IRQ_TYPE_LEVEL_HIGH>;
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 896 IRQ_TYPE_LEVEL_HIGH>;
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 898 IRQ_TYPE_LEVEL_HIGH>;
};
};
ssiu {
ssiu00: ssiu-0 {
dmas = <&dmac0 0x1d61>, <&dmac0 0x1d62>,
<&dmac1 0x1d61>, <&dmac1 0x1d62>,
<&dmac2 0x1d61>, <&dmac2 0x1d62>,
<&dmac3 0x1d61>, <&dmac3 0x1d62>,
<&dmac4 0x1d61>, <&dmac4 0x1d62>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu01: ssiu-1 {
dmas = <&dmac0 0x1d63>, <&dmac0 0x1d64>,
<&dmac1 0x1d63>, <&dmac1 0x1d64>,
<&dmac2 0x1d63>, <&dmac2 0x1d64>,
<&dmac3 0x1d63>, <&dmac3 0x1d64>,
<&dmac4 0x1d63>, <&dmac4 0x1d64>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu02: ssiu-2 {
dmas = <&dmac0 0x1d65>, <&dmac0 0x1d66>,
<&dmac1 0x1d65>, <&dmac1 0x1d66>,
<&dmac2 0x1d65>, <&dmac2 0x1d66>,
<&dmac3 0x1d65>, <&dmac3 0x1d66>,
<&dmac4 0x1d65>, <&dmac4 0x1d66>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu03: ssiu-3 {
dmas = <&dmac0 0x1d67>, <&dmac0 0x1d68>,
<&dmac1 0x1d67>, <&dmac1 0x1d68>,
<&dmac2 0x1d67>, <&dmac2 0x1d68>,
<&dmac3 0x1d67>, <&dmac3 0x1d68>,
<&dmac4 0x1d67>, <&dmac4 0x1d68>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu10: ssiu-4 {
dmas = <&dmac0 0x1d69>, <&dmac0 0x1d6a>,
<&dmac1 0x1d69>, <&dmac1 0x1d6a>,
<&dmac2 0x1d69>, <&dmac2 0x1d6a>,
<&dmac3 0x1d69>, <&dmac3 0x1d6a>,
<&dmac4 0x1d69>, <&dmac4 0x1d6a>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu11: ssiu-5 {
dmas = <&dmac0 0x1d6b>, <&dmac0 0x1d6c>,
<&dmac1 0x1d6b>, <&dmac1 0x1d6c>,
<&dmac2 0x1d6b>, <&dmac2 0x1d6c>,
<&dmac3 0x1d6b>, <&dmac3 0x1d6c>,
<&dmac4 0x1d6b>, <&dmac4 0x1d6c>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu12: ssiu-6 {
dmas = <&dmac0 0x1d6d>, <&dmac0 0x1d6e>,
<&dmac1 0x1d6d>, <&dmac1 0x1d6e>,
<&dmac2 0x1d6d>, <&dmac2 0x1d6e>,
<&dmac3 0x1d6d>, <&dmac3 0x1d6e>,
<&dmac4 0x1d6d>, <&dmac4 0x1d6e>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu13: ssiu-7 {
dmas = <&dmac0 0x1d6f>, <&dmac0 0x1d70>,
<&dmac1 0x1d6f>, <&dmac1 0x1d70>,
<&dmac2 0x1d6f>, <&dmac2 0x1d70>,
<&dmac3 0x1d6f>, <&dmac3 0x1d70>,
<&dmac4 0x1d6f>, <&dmac4 0x1d70>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu20: ssiu-8 {
dmas = <&dmac0 0x1d71>, <&dmac0 0x1d72>,
<&dmac1 0x1d71>, <&dmac1 0x1d72>,
<&dmac2 0x1d71>, <&dmac2 0x1d72>,
<&dmac3 0x1d71>, <&dmac3 0x1d72>,
<&dmac4 0x1d71>, <&dmac4 0x1d72>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu21: ssiu-9 {
dmas = <&dmac0 0x1d73>, <&dmac0 0x1d74>,
<&dmac1 0x1d73>, <&dmac1 0x1d74>,
<&dmac2 0x1d73>, <&dmac2 0x1d74>,
<&dmac3 0x1d73>, <&dmac3 0x1d74>,
<&dmac4 0x1d73>, <&dmac4 0x1d74>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu22: ssiu-10 {
dmas = <&dmac0 0x1d75>, <&dmac0 0x1d76>,
<&dmac1 0x1d75>, <&dmac1 0x1d76>,
<&dmac2 0x1d75>, <&dmac2 0x1d76>,
<&dmac3 0x1d75>, <&dmac3 0x1d76>,
<&dmac4 0x1d75>, <&dmac4 0x1d76>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu23: ssiu-11 {
dmas = <&dmac0 0x1d77>, <&dmac0 0x1d78>,
<&dmac1 0x1d77>, <&dmac1 0x1d78>,
<&dmac2 0x1d77>, <&dmac2 0x1d78>,
<&dmac3 0x1d77>, <&dmac3 0x1d78>,
<&dmac4 0x1d77>, <&dmac4 0x1d78>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu30: ssiu-12 {
dmas = <&dmac0 0x1d79>, <&dmac0 0x1d7a>,
<&dmac1 0x1d79>, <&dmac1 0x1d7a>,
<&dmac2 0x1d79>, <&dmac2 0x1d7a>,
<&dmac3 0x1d79>, <&dmac3 0x1d7a>,
<&dmac4 0x1d79>, <&dmac4 0x1d7a>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu31: ssiu-13 {
dmas = <&dmac0 0x1d7b>, <&dmac0 0x1d7c>,
<&dmac1 0x1d7b>, <&dmac1 0x1d7c>,
<&dmac2 0x1d7b>, <&dmac2 0x1d7c>,
<&dmac3 0x1d7b>, <&dmac3 0x1d7c>,
<&dmac4 0x1d7b>, <&dmac4 0x1d7c>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu32: ssiu-14 {
dmas = <&dmac0 0x1d7d>, <&dmac0 0x1d7e>,
<&dmac1 0x1d7d>, <&dmac1 0x1d7e>,
<&dmac2 0x1d7d>, <&dmac2 0x1d7e>,
<&dmac3 0x1d7d>, <&dmac3 0x1d7e>,
<&dmac4 0x1d7d>, <&dmac4 0x1d7e>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu33: ssiu-15 {
dmas = <&dmac0 0x1d7f>, <&dmac0 0x1d80>,
<&dmac1 0x1d7f>, <&dmac1 0x1d80>,
<&dmac2 0x1d7f>, <&dmac2 0x1d80>,
<&dmac3 0x1d7f>, <&dmac3 0x1d80>,
<&dmac4 0x1d7f>, <&dmac4 0x1d80>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu40: ssiu-16 {
dmas = <&dmac0 0x1d81>, <&dmac0 0x1d82>,
<&dmac1 0x1d81>, <&dmac1 0x1d82>,
<&dmac2 0x1d81>, <&dmac2 0x1d82>,
<&dmac3 0x1d81>, <&dmac3 0x1d82>,
<&dmac4 0x1d81>, <&dmac4 0x1d82>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu41: ssiu-17 {
dmas = <&dmac0 0x1d83>, <&dmac0 0x1d84>,
<&dmac1 0x1d83>, <&dmac1 0x1d84>,
<&dmac2 0x1d83>, <&dmac2 0x1d84>,
<&dmac3 0x1d83>, <&dmac3 0x1d84>,
<&dmac4 0x1d83>, <&dmac4 0x1d84>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu42: ssiu-18 {
dmas = <&dmac0 0x1d85>, <&dmac0 0x1d86>,
<&dmac1 0x1d85>, <&dmac1 0x1d86>,
<&dmac2 0x1d85>, <&dmac2 0x1d86>,
<&dmac3 0x1d85>, <&dmac3 0x1d86>,
<&dmac4 0x1d85>, <&dmac4 0x1d86>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu43: ssiu-19 {
dmas = <&dmac0 0x1d87>, <&dmac0 0x1d88>,
<&dmac1 0x1d87>, <&dmac1 0x1d88>,
<&dmac2 0x1d87>, <&dmac2 0x1d88>,
<&dmac3 0x1d87>, <&dmac3 0x1d88>,
<&dmac4 0x1d87>, <&dmac4 0x1d88>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu50: ssiu-20 {
dmas = <&dmac0 0x1d89>, <&dmac0 0x1d8a>,
<&dmac1 0x1d89>, <&dmac1 0x1d8a>,
<&dmac2 0x1d89>, <&dmac2 0x1d8a>,
<&dmac3 0x1d89>, <&dmac3 0x1d8a>,
<&dmac4 0x1d89>, <&dmac4 0x1d8a>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu60: ssiu-21 {
dmas = <&dmac0 0x1d8b>, <&dmac0 0x1d8c>,
<&dmac1 0x1d8b>, <&dmac1 0x1d8c>,
<&dmac2 0x1d8b>, <&dmac2 0x1d8c>,
<&dmac3 0x1d8b>, <&dmac3 0x1d8c>,
<&dmac4 0x1d8b>, <&dmac4 0x1d8c>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu70: ssiu-22 {
dmas = <&dmac0 0x1d8d>, <&dmac0 0x1d8e>,
<&dmac1 0x1d8d>, <&dmac1 0x1d8e>,
<&dmac2 0x1d8d>, <&dmac2 0x1d8e>,
<&dmac3 0x1d8d>, <&dmac3 0x1d8e>,
<&dmac4 0x1d8d>, <&dmac4 0x1d8e>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu80: ssiu-23 {
dmas = <&dmac0 0x1d8f>, <&dmac0 0x1d90>,
<&dmac1 0x1d8f>, <&dmac1 0x1d90>,
<&dmac2 0x1d8f>, <&dmac2 0x1d90>,
<&dmac3 0x1d8f>, <&dmac3 0x1d90>,
<&dmac4 0x1d8f>, <&dmac4 0x1d90>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu90: ssiu-24 {
dmas = <&dmac0 0x1d91>, <&dmac0 0x1d92>,
<&dmac1 0x1d91>, <&dmac1 0x1d92>,
<&dmac2 0x1d91>, <&dmac2 0x1d92>,
<&dmac3 0x1d91>, <&dmac3 0x1d92>,
<&dmac4 0x1d91>, <&dmac4 0x1d92>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu91: ssiu-25 {
dmas = <&dmac0 0x1d93>, <&dmac0 0x1d94>,
<&dmac1 0x1d93>, <&dmac1 0x1d94>,
<&dmac2 0x1d93>, <&dmac2 0x1d94>,
<&dmac3 0x1d93>, <&dmac3 0x1d94>,
<&dmac4 0x1d93>, <&dmac4 0x1d94>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu92: ssiu-26 {
dmas = <&dmac0 0x1d95>, <&dmac0 0x1d96>,
<&dmac1 0x1d95>, <&dmac1 0x1d96>,
<&dmac2 0x1d95>, <&dmac2 0x1d96>,
<&dmac3 0x1d95>, <&dmac3 0x1d96>,
<&dmac4 0x1d95>, <&dmac4 0x1d96>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
ssiu93: ssiu-27 {
dmas = <&dmac0 0x1d97>, <&dmac0 0x1d98>,
<&dmac1 0x1d97>, <&dmac1 0x1d98>,
<&dmac2 0x1d97>, <&dmac2 0x1d98>,
<&dmac3 0x1d97>, <&dmac3 0x1d98>,
<&dmac4 0x1d97>, <&dmac4 0x1d98>;
dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx",
"tx", "rx";
};
};
};
wdt1: watchdog@14400000 {
compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";
reg = <0 0x14400000 0 0x400>;