mvebu dt64 for 6.6 (part 1)

Add the NAND Flash Controller on the AC5/AC5X SOC device tree
 Fix style issue
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Merge tag 'mvebu-dt64-6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt

mvebu dt64 for 6.6 (part 1)

Add the NAND Flash Controller on the AC5/AC5X SOC device tree
Fix style issue

* tag 'mvebu-dt64-6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: Add NAND flash controller to AC5
  arm64: dts: marvell: add missing space before {

Link: https://lore.kernel.org/r/87edk8t0kl.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-08-14 19:07:44 +02:00
commit 7cb74e0c66
2 changed files with 19 additions and 3 deletions

View File

@ -135,7 +135,7 @@ mdio: mdio@22004 {
clocks = <&cnm_clock>;
};
i2c0: i2c@11000{
i2c0: i2c@11000 {
compatible = "marvell,mv78230-i2c";
reg = <0x11000 0x20>;
#address-cells = <1>;
@ -154,7 +154,7 @@ i2c0: i2c@11000{
status = "disabled";
};
i2c1: i2c@11100{
i2c1: i2c@11100 {
compatible = "marvell,mv78230-i2c";
reg = <0x11100 0x20>;
#address-cells = <1>;
@ -297,6 +297,16 @@ spi1: spi@805a8000 {
status = "disabled";
};
nand: nand-controller@805b0000 {
compatible = "marvell,ac5-nand-controller";
reg = <0x0 0x805b0000 0x0 0x00000054>;
#address-cells = <0x1>;
#size-cells = <0x0>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&nand_clock>;
status = "disabled";
};
gic: interrupt-controller@80600000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
@ -319,5 +329,11 @@ spi_clock: spi-clock {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
nand_clock: nand-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
};
};
};

View File

@ -149,7 +149,7 @@ &cp0_spi0 {
};
/* SPI-NOR */
&cp0_spi1{
&cp0_spi1 {
status = "okay";
pinctrl-names = "default";