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mtd: spi-nor: Improve opcodes documentation
There are two status registers, named 1 and 2. The current wording is
misleading as "1" may refer to the status register ID as well as the
number of bytes required (which, in this case can be 1 or 2).
Clarify the comments by aligning them on the same pattern:
"{read,write} status {1,2} register"
Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
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@ -21,8 +21,8 @@
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/* Flash opcodes. */
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#define SPINOR_OP_WRDI 0x04 /* Write disable */
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#define SPINOR_OP_WREN 0x06 /* Write enable */
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#define SPINOR_OP_RDSR 0x05 /* Read status register */
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#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
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#define SPINOR_OP_RDSR 0x05 /* Read status register 1 */
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#define SPINOR_OP_WRSR 0x01 /* Write status register 1 */
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#define SPINOR_OP_RDSR2 0x3f /* Read status register 2 */
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#define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */
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#define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */
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