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ASoC: cs35l56: Fixes for CS35L63 for production
Merge series from Stefan Binding <sbinding@opensource.cirrus.com>: Production silicon for CS36L63 has some small differences compared to pre-production silicon. This requires small fixes in driver. Update firmware addresses, tuning algorithm IDs and remove soundwire clock workaround as no longer necessary. No product was ever released using pre-production silicon, therefore there is no need to keep support for it.
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commit
7c15e4cabf
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@ -107,8 +107,8 @@
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#define CS35L56_DSP1_PMEM_5114 0x3804FE8
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#define CS35L63_DSP1_FW_VER CS35L56_DSP1_FW_VER
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#define CS35L63_DSP1_HALO_STATE 0x280396C
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#define CS35L63_DSP1_PM_CUR_STATE 0x28042C8
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#define CS35L63_DSP1_HALO_STATE 0x2803C04
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#define CS35L63_DSP1_PM_CUR_STATE 0x2804518
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#define CS35L63_PROTECTION_STATUS 0x340009C
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#define CS35L63_TRANSDUCER_ACTUAL_PS 0x34000F4
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#define CS35L63_MAIN_RENDER_USER_MUTE 0x3400020
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@ -306,6 +306,7 @@ struct cs35l56_base {
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struct gpio_desc *reset_gpio;
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struct cs35l56_spi_payload *spi_payload_buf;
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const struct cs35l56_fw_reg *fw_reg;
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const struct cirrus_amp_cal_controls *calibration_controls;
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};
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static inline bool cs35l56_is_otp_register(unsigned int reg)
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@ -393,74 +393,6 @@ static int cs35l56_sdw_update_status(struct sdw_slave *peripheral,
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return 0;
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}
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static int cs35l63_sdw_kick_divider(struct cs35l56_private *cs35l56,
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struct sdw_slave *peripheral)
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{
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unsigned int curr_scale_reg, next_scale_reg;
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int curr_scale, next_scale, ret;
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if (!cs35l56->base.init_done)
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return 0;
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if (peripheral->bus->params.curr_bank) {
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curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1;
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next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0;
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} else {
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curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0;
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next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1;
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}
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/*
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* Current clock scale value must be different to new value.
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* Modify current to guarantee this. If next still has the dummy
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* value we wrote when it was current, the core code has not set
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* a new scale so restore its original good value
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*/
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curr_scale = sdw_read_no_pm(peripheral, curr_scale_reg);
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if (curr_scale < 0) {
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dev_err(cs35l56->base.dev, "Failed to read current clock scale: %d\n", curr_scale);
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return curr_scale;
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}
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next_scale = sdw_read_no_pm(peripheral, next_scale_reg);
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if (next_scale < 0) {
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dev_err(cs35l56->base.dev, "Failed to read next clock scale: %d\n", next_scale);
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return next_scale;
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}
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if (next_scale == CS35L56_SDW_INVALID_BUS_SCALE) {
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next_scale = cs35l56->old_sdw_clock_scale;
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ret = sdw_write_no_pm(peripheral, next_scale_reg, next_scale);
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if (ret < 0) {
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dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n",
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ret);
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return ret;
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}
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}
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cs35l56->old_sdw_clock_scale = curr_scale;
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ret = sdw_write_no_pm(peripheral, curr_scale_reg, CS35L56_SDW_INVALID_BUS_SCALE);
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if (ret < 0) {
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dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n", ret);
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return ret;
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}
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dev_dbg(cs35l56->base.dev, "Next bus scale: %#x\n", next_scale);
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return 0;
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}
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static int cs35l56_sdw_bus_config(struct sdw_slave *peripheral,
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struct sdw_bus_params *params)
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{
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struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
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if ((cs35l56->base.type == 0x63) && (cs35l56->base.rev < 0xa1))
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return cs35l63_sdw_kick_divider(cs35l56, peripheral);
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return 0;
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}
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static int __maybe_unused cs35l56_sdw_clk_stop(struct sdw_slave *peripheral,
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enum sdw_clk_stop_mode mode,
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enum sdw_clk_stop_type type)
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@ -476,7 +408,6 @@ static const struct sdw_slave_ops cs35l56_sdw_ops = {
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.read_prop = cs35l56_sdw_read_prop,
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.interrupt_callback = cs35l56_sdw_interrupt,
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.update_status = cs35l56_sdw_update_status,
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.bus_config = cs35l56_sdw_bus_config,
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#ifdef DEBUG
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.clk_stop = cs35l56_sdw_clk_stop,
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#endif
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@ -838,6 +838,15 @@ const struct cirrus_amp_cal_controls cs35l56_calibration_controls = {
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};
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EXPORT_SYMBOL_NS_GPL(cs35l56_calibration_controls, "SND_SOC_CS35L56_SHARED");
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static const struct cirrus_amp_cal_controls cs35l63_calibration_controls = {
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.alg_id = 0xbf210,
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.mem_region = WMFW_ADSP2_YM,
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.ambient = "CAL_AMBIENT",
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.calr = "CAL_R",
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.status = "CAL_STATUS",
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.checksum = "CAL_CHECKSUM",
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};
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int cs35l56_get_calibration(struct cs35l56_base *cs35l56_base)
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{
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u64 silicon_uid = 0;
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@ -912,19 +921,31 @@ EXPORT_SYMBOL_NS_GPL(cs35l56_read_prot_status, "SND_SOC_CS35L56_SHARED");
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void cs35l56_log_tuning(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp)
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{
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__be32 pid, sid, tid;
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unsigned int alg_id;
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int ret;
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switch (cs35l56_base->type) {
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case 0x54:
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case 0x56:
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case 0x57:
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alg_id = 0x9f212;
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break;
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default:
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alg_id = 0xbf212;
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break;
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}
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scoped_guard(mutex, &cs_dsp->pwr_lock) {
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ret = cs_dsp_coeff_read_ctrl(cs_dsp_get_ctl(cs_dsp, "AS_PRJCT_ID",
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WMFW_ADSP2_XM, 0x9f212),
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WMFW_ADSP2_XM, alg_id),
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0, &pid, sizeof(pid));
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if (!ret)
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ret = cs_dsp_coeff_read_ctrl(cs_dsp_get_ctl(cs_dsp, "AS_CHNNL_ID",
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WMFW_ADSP2_XM, 0x9f212),
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WMFW_ADSP2_XM, alg_id),
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0, &sid, sizeof(sid));
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if (!ret)
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ret = cs_dsp_coeff_read_ctrl(cs_dsp_get_ctl(cs_dsp, "AS_SNPSHT_ID",
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WMFW_ADSP2_XM, 0x9f212),
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WMFW_ADSP2_XM, alg_id),
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0, &tid, sizeof(tid));
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}
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@ -974,8 +995,10 @@ int cs35l56_hw_init(struct cs35l56_base *cs35l56_base)
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case 0x35A54:
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case 0x35A56:
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case 0x35A57:
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cs35l56_base->calibration_controls = &cs35l56_calibration_controls;
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break;
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case 0x35A630:
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cs35l56_base->calibration_controls = &cs35l63_calibration_controls;
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devid = devid >> 4;
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break;
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default:
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@ -695,7 +695,7 @@ static int cs35l56_write_cal(struct cs35l56_private *cs35l56)
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return ret;
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ret = cs_amp_write_cal_coeffs(&cs35l56->dsp.cs_dsp,
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&cs35l56_calibration_controls,
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cs35l56->base.calibration_controls,
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&cs35l56->base.cal_data);
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wm_adsp_stop(&cs35l56->dsp);
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@ -20,8 +20,6 @@
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#define CS35L56_SDW_GEN_INT_MASK_1 0xc1
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#define CS35L56_SDW_INT_MASK_CODEC_IRQ BIT(0)
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#define CS35L56_SDW_INVALID_BUS_SCALE 0xf
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#define CS35L56_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
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#define CS35L56_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE \
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| SNDRV_PCM_FMTBIT_S32_LE)
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@ -52,7 +50,6 @@ struct cs35l56_private {
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u8 asp_slot_count;
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bool tdm_mode;
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bool sysclk_set;
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u8 old_sdw_clock_scale;
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u8 sdw_link_num;
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u8 sdw_unique_id;
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};
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