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tty: serial: fsl_lpuart: set receive watermark for imx8qxp platform
Since imx8qxp RX FIFO depth is 64 datawords, it will be better to set the rx watermark as 31, which means when the number of datawords in the receive FIFO(>= 32) is greater than the watermark, an interrupt or a DMA request is generated. Also keep the console rx watermark as 1 to make sure it responsive. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Link: https://lore.kernel.org/r/20230130064449.9564-3-sherry.sun@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -321,7 +321,7 @@ static struct lpuart_soc_data imx8qxp_data = {
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.devtype = IMX8QXP_LPUART,
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.iotype = UPIO_MEM32,
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.reg_off = IMX_REG_OFF,
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.rx_watermark = 1,
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.rx_watermark = 31,
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};
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static struct lpuart_soc_data imxrt1050_data = {
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.devtype = IMXRT1050_LPUART,
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@ -1527,6 +1527,8 @@ static void lpuart_setup_watermark(struct lpuart_port *sport)
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writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO);
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}
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if (uart_console(&sport->port))
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sport->rx_watermark = 1;
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writeb(0, sport->port.membase + UARTTWFIFO);
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writeb(sport->rx_watermark, sport->port.membase + UARTRWFIFO);
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@ -1563,6 +1565,8 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport)
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lpuart32_write(&sport->port, val, UARTFIFO);
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/* set the watermark */
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if (uart_console(&sport->port))
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sport->rx_watermark = 1;
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val = (sport->rx_watermark << UARTWATER_RXWATER_OFF) |
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(0x0 << UARTWATER_TXWATER_OFF);
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lpuart32_write(&sport->port, val, UARTWATER);
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