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Merge branch 'pci/controller/mediatek'
- Use FIELD_PREP() to fix incorrect operator precedence in PCIE_FTS_NUM_L0 (Li RongQing) - Fix IRQ domain leak when port fails to enable (Manivannan Sadhasivam) - Use actual physical address for MSI message address instead of virt_to_phys() (Manivannan Sadhasivam) - Add EcoNet EN7528 to DT binding (Caleb James DeLisle) * pci/controller/mediatek: dt-bindings: PCI: mediatek: Add support for EcoNet EN7528 PCI: mediatek: Use actual physical address instead of virt_to_phys() PCI: mediatek: Fix IRQ domain leak when port fails to enable PCI: mediatek: Fix operator precedence in PCIE_FTS_NUM_L0 macro
This commit is contained in:
Bjorn Helgaas
commit
7b90019012
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@ -14,6 +14,7 @@ properties:
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oneOf:
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- enum:
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- airoha,an7583-pcie
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- econet,en7528-pcie
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- mediatek,mt2712-pcie
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- mediatek,mt7622-pcie
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- mediatek,mt7629-pcie
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@ -226,6 +227,31 @@ allOf:
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mediatek,pbus-csr: false
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- if:
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properties:
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compatible:
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contains:
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const: econet,en7528-pcie
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then:
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properties:
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clocks:
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maxItems: 1
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clock-names:
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maxItems: 1
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resets: false
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reset-names: false
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power-domains: false
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mediatek,pbus-csr: false
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required:
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- phys
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- phy-names
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unevaluatedProperties: false
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examples:
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@ -7,6 +7,7 @@
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* Honghui Zhang <honghui.zhang@mediatek.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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@ -61,7 +62,7 @@
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/* MediaTek specific configuration registers */
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#define PCIE_FTS_NUM 0x70c
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#define PCIE_FTS_NUM_MASK GENMASK(15, 8)
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#define PCIE_FTS_NUM_L0(x) ((x) & 0xff << 8)
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#define PCIE_FTS_NUM_L0(x) FIELD_PREP(PCIE_FTS_NUM_MASK, x)
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#define PCIE_FC_CREDIT 0x73c
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#define PCIE_FC_CREDIT_MASK (GENMASK(31, 31) | GENMASK(28, 16))
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@ -175,6 +176,7 @@ struct mtk_pcie_soc {
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/**
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* struct mtk_pcie_port - PCIe port information
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* @base: IO mapped register base
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* @phys_base: Physical address of the I/O register base region
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* @list: port list
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* @pcie: pointer to PCIe host info
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* @reset: pointer to port reset control
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@ -196,6 +198,7 @@ struct mtk_pcie_soc {
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*/
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struct mtk_pcie_port {
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void __iomem *base;
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phys_addr_t phys_base;
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struct list_head list;
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struct mtk_pcie *pcie;
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struct reset_control *reset;
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@ -405,7 +408,7 @@ static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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phys_addr_t addr;
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/* MT2712/MT7622 only support 32-bit MSI addresses */
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addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
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addr = port->phys_base + PCIE_MSI_VECTOR;
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msg->address_hi = 0;
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msg->address_lo = lower_32_bits(addr);
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@ -520,7 +523,7 @@ static void mtk_pcie_enable_msi(struct mtk_pcie_port *port)
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u32 val;
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phys_addr_t msg_addr;
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msg_addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
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msg_addr = port->phys_base + PCIE_MSI_VECTOR;
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val = lower_32_bits(msg_addr);
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writel(val, port->base + PCIE_IMSI_ADDR);
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@ -529,23 +532,27 @@ static void mtk_pcie_enable_msi(struct mtk_pcie_port *port)
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writel(val, port->base + PCIE_INT_MASK);
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}
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static void mtk_pcie_irq_teardown_port(struct mtk_pcie_port *port)
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{
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irq_set_chained_handler_and_data(port->irq, NULL, NULL);
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if (port->irq_domain)
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irq_domain_remove(port->irq_domain);
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if (IS_ENABLED(CONFIG_PCI_MSI)) {
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if (port->inner_domain)
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irq_domain_remove(port->inner_domain);
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}
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irq_dispose_mapping(port->irq);
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}
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static void mtk_pcie_irq_teardown(struct mtk_pcie *pcie)
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{
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struct mtk_pcie_port *port, *tmp;
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list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
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irq_set_chained_handler_and_data(port->irq, NULL, NULL);
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if (port->irq_domain)
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irq_domain_remove(port->irq_domain);
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if (IS_ENABLED(CONFIG_PCI_MSI)) {
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if (port->inner_domain)
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irq_domain_remove(port->inner_domain);
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}
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irq_dispose_mapping(port->irq);
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}
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list_for_each_entry_safe(port, tmp, &pcie->ports, list)
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mtk_pcie_irq_teardown_port(port);
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}
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static int mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
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@ -865,7 +872,7 @@ static int mtk_pcie_startup_port_an7583(struct mtk_pcie_port *port)
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return mtk_pcie_startup_port_v2(port);
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}
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static void mtk_pcie_enable_port(struct mtk_pcie_port *port)
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static int mtk_pcie_enable_port(struct mtk_pcie_port *port)
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{
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struct mtk_pcie *pcie = port->pcie;
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struct device *dev = pcie->dev;
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@ -874,7 +881,7 @@ static void mtk_pcie_enable_port(struct mtk_pcie_port *port)
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err = clk_prepare_enable(port->sys_ck);
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if (err) {
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dev_err(dev, "failed to enable sys_ck%d clock\n", port->slot);
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goto err_sys_clk;
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return err;
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}
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err = clk_prepare_enable(port->ahb_ck);
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@ -922,11 +929,15 @@ static void mtk_pcie_enable_port(struct mtk_pcie_port *port)
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goto err_phy_on;
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}
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if (!pcie->soc->startup(port))
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return;
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err = pcie->soc->startup(port);
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if (err) {
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dev_info(dev, "Port%d link down\n", port->slot);
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goto err_soc_startup;
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}
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dev_info(dev, "Port%d link down\n", port->slot);
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return 0;
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err_soc_startup:
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phy_power_off(port->phy);
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err_phy_on:
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phy_exit(port->phy);
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@ -942,8 +953,8 @@ static void mtk_pcie_enable_port(struct mtk_pcie_port *port)
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clk_disable_unprepare(port->ahb_ck);
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err_ahb_clk:
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clk_disable_unprepare(port->sys_ck);
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err_sys_clk:
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mtk_pcie_port_free(port);
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return err;
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}
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static int mtk_pcie_parse_port(struct mtk_pcie *pcie,
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@ -953,6 +964,7 @@ static int mtk_pcie_parse_port(struct mtk_pcie *pcie,
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struct mtk_pcie_port *port;
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struct device *dev = pcie->dev;
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struct platform_device *pdev = to_platform_device(dev);
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struct resource *res;
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char name[20];
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int err;
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@ -961,7 +973,14 @@ static int mtk_pcie_parse_port(struct mtk_pcie *pcie,
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return -ENOMEM;
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snprintf(name, sizeof(name), "port%d", slot);
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port->base = devm_platform_ioremap_resource_byname(pdev, name);
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
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if (!res) {
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dev_err(dev, "failed to get port%d base\n", slot);
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return -EINVAL;
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}
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port->phys_base = res->start;
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port->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(port->base)) {
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dev_err(dev, "failed to map port%d base\n", slot);
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return PTR_ERR(port->base);
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@ -1109,8 +1128,13 @@ static int mtk_pcie_setup(struct mtk_pcie *pcie)
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return err;
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/* enable each port, and then check link status */
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list_for_each_entry_safe(port, tmp, &pcie->ports, list)
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mtk_pcie_enable_port(port);
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list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
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err = mtk_pcie_enable_port(port);
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if (err) {
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mtk_pcie_irq_teardown_port(port);
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mtk_pcie_port_free(port);
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}
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}
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/* power down PCIe subsys if slots are all empty (link down) */
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if (list_empty(&pcie->ports))
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@ -1209,14 +1233,18 @@ static int mtk_pcie_resume_noirq(struct device *dev)
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{
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struct mtk_pcie *pcie = dev_get_drvdata(dev);
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struct mtk_pcie_port *port, *tmp;
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int err;
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if (list_empty(&pcie->ports))
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return 0;
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clk_prepare_enable(pcie->free_ck);
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list_for_each_entry_safe(port, tmp, &pcie->ports, list)
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mtk_pcie_enable_port(port);
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list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
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err = mtk_pcie_enable_port(port);
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if (err)
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mtk_pcie_port_free(port);
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}
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/* In case of EP was removed while system suspend. */
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if (list_empty(&pcie->ports))
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