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drm/amd/pm: Add PMFW message and capability flags

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Add flags to categorize messages and PMFW capabilities.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2024-03-21 18:52:39 +05:30 committed by Alex Deucher
parent b41f742d6f
commit 7b8081ea67
3 changed files with 12 additions and 4 deletions
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7
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
View File

@ -459,7 +459,7 @@ struct smu_umd_pstate_table {
struct cmn2asic_msg_mapping {
int valid_mapping;
int map_to;
int valid_in_vf;
uint32_t flags;
};
struct cmn2asic_mapping {
@ -539,6 +539,7 @@ struct smu_context {
uint32_t smc_driver_if_version;
uint32_t smc_fw_if_version;
uint32_t smc_fw_version;
uint32_t smc_fw_caps;
bool uploading_custom_pp_table;
bool dc_controlled_by_gpio;
@ -1485,8 +1486,8 @@ enum smu_baco_seq {
BACO_SEQ_COUNT,
};
#define MSG_MAP(msg, index, valid_in_vf) \
[SMU_MSG_##msg] = {1, (index), (valid_in_vf)}
#define MSG_MAP(msg, index, flags) \
[SMU_MSG_##msg] = {1, (index), (flags)}
#define CLK_MAP(clk, index) \
[SMU_##clk] = {1, (index)}

7
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
View File

@ -445,4 +445,11 @@ enum smu_feature_mask {
SMU_FEATURE_COUNT,
};
/* Message category flags */
#define SMU_MSG_VF_FLAG (1U << 0)
#define SMU_MSG_RAS_PRI (1U << 1)
/* Firmware capability flags */
#define SMU_FW_CAP_RAS_PRI (1U << 0)
#endif

2
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
View File

@ -437,7 +437,7 @@ int smu_cmn_to_asic_specific_index(struct smu_context *smu,
return -EINVAL;
if (amdgpu_sriov_vf(smu->adev) &&
!msg_mapping.valid_in_vf)
!(msg_mapping.flags & SMU_MSG_VF_FLAG))
return -EACCES;
return msg_mapping.map_to;