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serial: max310x: support active-low RTS on the hardware path

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The chip's auto-RTS engine asserts the RTS_ pin high while data is
shifting out, so a transceiver with an active-low driver-enable could
not use the hardware RS485 path at all: SER_RS485_RTS_AFTER_SEND is
not in the supported flags and the core normalizes it away with
"invalid RTS setting, using RTS_ON_SEND instead".

The output stage is invertible: program IRDA.RTSINVERT when the
requested polarity is active-low and advertise SER_RS485_RTS_AFTER_SEND
in rs485_supported. A break already drives break_state onto the RTS
bit unadjusted, which remains correct because RTSINVERT inverts the
output stage itself, not the register value.

Assisted-by: Claude:claude-fable-5
Signed-off-by: Tapio Reijonen <tapio.reijonen@vaisala.com>
Link: https://patch.msgid.link/20261008-max310x-rs485-sw-delay-v8-6-6ba881f81e1f@vaisala.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tapio Reijonen 2026-10-08 09:48:29 +00:00 committed by Greg Kroah-Hartman
parent c3ad42ccd3
commit 7b07356e82
1 changed files with 15 additions and 3 deletions
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18
drivers/tty/serial/max310x.c
View File

@ -162,6 +162,7 @@
/* IRDA register bits */
#define MAX310X_IRDA_IRDAEN_BIT (1 << 0) /* IRDA mode enable */
#define MAX310X_IRDA_SIR_BIT (1 << 1) /* SIR mode enable */
#define MAX310X_IRDA_RTSINVERT_BIT (1 << 2) /* Invert RTS output */
/* HDPIXDELAY accessor macros */
#define MAX310X_HDPIXDELAY_SETUP(val) (((val) & 0x0f) << 4)
@ -949,7 +950,7 @@ static void max310x_set_rts_ctl_params(struct max310x_one *one)
const unsigned int max_bit_dly = 15;
struct uart_port *port = &one->port;
unsigned int setup = 0, hold = 0;
u8 mode1 = 0;
u8 mode1 = 0, irda = 0;
if (port->rs485.flags & SER_RS485_ENABLED) {
/* Convert milliseconds to bit-times, rounding up. */
@ -961,6 +962,12 @@ static void max310x_set_rts_ctl_params(struct max310x_one *one)
hold = min(hold, max_bit_dly);
mode1 = MAX310X_MODE1_TRNSCVCTRL_BIT;
/*
* The auto-RTS engine asserts RTS high on send; for an
* active-low RTS let IRDA.RTSINVERT invert the output stage.
*/
if (!(port->rs485.flags & SER_RS485_RTS_ON_SEND))
irda = MAX310X_IRDA_RTSINVERT_BIT;
}
max310x_port_write(port, MAX310X_HDPIXDELAY_REG,
@ -978,6 +985,8 @@ static void max310x_set_rts_ctl_params(struct max310x_one *one)
max310x_port_update(port, MAX310X_MODE1_REG,
MAX310X_MODE1_TRNSCVCTRL_BIT, mode1);
max310x_port_update(port, MAX310X_IRDA_REG,
MAX310X_IRDA_RTSINVERT_BIT, irda);
}
static void max310x_break_ctl(struct uart_port *port, int break_state)
@ -994,7 +1003,9 @@ static void max310x_break_ctl(struct uart_port *port, int break_state)
* The chip's auto-RTS asserts the transceiver only while FIFO data is
* shifting out, and a break is not FIFO data. Disable auto-RTS for the
* break duration and drive RTS manually so the break reaches the wire;
* restore auto-RTS when the break ends.
* restore auto-RTS when the break ends. For an active-low RTS,
* IRDA.RTSINVERT already inverts the RTS_ output stage, so break_state
* is driven as it is.
*/
if (break_state) {
if (!(port->rs485.flags & SER_RS485_ENABLED))
@ -1425,7 +1436,8 @@ static int max310x_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
#endif
static const struct serial_rs485 max310x_rs485_supported = {
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RX_DURING_TX,
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
SER_RS485_RTS_AFTER_SEND | SER_RS485_RX_DURING_TX,
.delay_rts_before_send = 1,
.delay_rts_after_send = 1,
};