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drm/amd/display: Clean up Per-DPM Struct

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[WHY/HOW]
Deprecate original organization in favor for the organization used by v2.
External usages no longer used so it can be removed entirely.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Austin Zheng <Austin.Zheng@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Austin Zheng 2026-08-12 13:25:01 -04:00 committed by Alex Deucher
parent 61ba35abd8
commit 7aec00d8a8
1 changed files with 4 additions and 28 deletions
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32
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h
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@ -78,41 +78,17 @@ enum dml2_qos_param_type {
// - If a non-zero DPM index has derate_percent = 0, fall back to index 0
// Unpopulated derates should fallback to the global derate value.
// Each element pairs a derate percentage with its threshold
struct dml2_soc_derate_values_per_dpm_v2 {
struct dml2_soc_derate_values_per_dpm {
unsigned int derate_percent;
unsigned int clk_upperbound_threshold_khz;
};
// Legacy structure - for backward compatibility as driver debug values can override the values. (will temporarily break driver overrides)
// Per-DPM derate arrays for system_active_average (the only power state that varies by DPM)
// Urgent derates are constant across DPMs and come from derate_table.system_active_urgent
struct dml2_soc_derate_values_per_dpm {
unsigned int dram_derate_percent_pixel[DML_MAX_CLK_TABLE_SIZE];
unsigned int fclk_derate_percent[DML_MAX_CLK_TABLE_SIZE];
unsigned int dcfclk_derate_percent[DML_MAX_CLK_TABLE_SIZE];
};
struct dml2_soc_derates_per_dpm {
// Union allows both layouts to coexist without increasing struct size
// Anonymous structs allow direct member access without .v1 or .v2 prefix
union {
// Legacy layout - used by soc_and_ip_translator (unchanged access pattern)
// TODO: Remove after soc_and_ip_translator migration is complete
struct {
struct dml2_soc_derate_values_per_dpm system_active_derates_per_dpm;
unsigned int min_uclk_khz_threshold[DML_MAX_CLK_TABLE_SIZE];
unsigned int min_fclk_khz_threshold[DML_MAX_CLK_TABLE_SIZE];
unsigned int min_dcfclk_khz_threshold[DML_MAX_CLK_TABLE_SIZE];
};
// New layout - used by DML internally
// Arrays of derate/threshold pairs, one per DPM level
struct {
struct dml2_soc_derate_values_per_dpm_v2 dram_per_dpm_derate_pixel[DML_MAX_CLK_TABLE_SIZE];
struct dml2_soc_derate_values_per_dpm_v2 fclk_per_dpm_derate[DML_MAX_CLK_TABLE_SIZE];
struct dml2_soc_derate_values_per_dpm_v2 dcfclk_per_dpm_derate[DML_MAX_CLK_TABLE_SIZE];
};
};
struct dml2_soc_derate_values_per_dpm dram_per_dpm_derate_pixel[DML_MAX_CLK_TABLE_SIZE];
struct dml2_soc_derate_values_per_dpm fclk_per_dpm_derate[DML_MAX_CLK_TABLE_SIZE];
struct dml2_soc_derate_values_per_dpm dcfclk_per_dpm_derate[DML_MAX_CLK_TABLE_SIZE];
};
struct dml2_soc_qos_parameters {